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0051 #ifdef HAVE_CONFIG_H
0052 #include "config.h"
0053 #endif
0054
0055 #include <rtems.h>
0056
0057 #include "ts-config.h"
0058 #include "tx-support.h"
0059
0060 #include <rtems/test.h>
0061
0062
0063
0064
0065
0066
0067
0068
0069
0070
0071 typedef enum {
0072 RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_Yes,
0073 RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_No,
0074 RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_NA
0075 } RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler;
0076
0077 typedef enum {
0078 RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex_Invalid,
0079 RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex_Valid,
0080 RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex_NA
0081 } RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex;
0082
0083 typedef enum {
0084 RtemsSchedulerReqIdentByProcessor_Pre_Id_Valid,
0085 RtemsSchedulerReqIdentByProcessor_Pre_Id_Null,
0086 RtemsSchedulerReqIdentByProcessor_Pre_Id_NA
0087 } RtemsSchedulerReqIdentByProcessor_Pre_Id;
0088
0089 typedef enum {
0090 RtemsSchedulerReqIdentByProcessor_Post_Status_Ok,
0091 RtemsSchedulerReqIdentByProcessor_Post_Status_InvAddr,
0092 RtemsSchedulerReqIdentByProcessor_Post_Status_InvName,
0093 RtemsSchedulerReqIdentByProcessor_Post_Status_IncStat,
0094 RtemsSchedulerReqIdentByProcessor_Post_Status_NA
0095 } RtemsSchedulerReqIdentByProcessor_Post_Status;
0096
0097 typedef enum {
0098 RtemsSchedulerReqIdentByProcessor_Post_IdVar_Set,
0099 RtemsSchedulerReqIdentByProcessor_Post_IdVar_Nop,
0100 RtemsSchedulerReqIdentByProcessor_Post_IdVar_NA
0101 } RtemsSchedulerReqIdentByProcessor_Post_IdVar;
0102
0103 typedef struct {
0104 uint16_t Skip : 1;
0105 uint16_t Pre_CPUOwnedByScheduler_NA : 1;
0106 uint16_t Pre_CPUIndex_NA : 1;
0107 uint16_t Pre_Id_NA : 1;
0108 uint16_t Post_Status : 3;
0109 uint16_t Post_IdVar : 2;
0110 } RtemsSchedulerReqIdentByProcessor_Entry;
0111
0112
0113
0114
0115
0116 typedef struct {
0117
0118
0119
0120 rtems_id second_scheduler_id;
0121
0122
0123
0124
0125 rtems_id id_value;
0126
0127
0128
0129
0130
0131 bool cpu_has_scheduler;
0132
0133
0134
0135
0136
0137 rtems_status_code status;
0138
0139
0140
0141
0142 uint32_t cpu_index;
0143
0144
0145
0146
0147 rtems_id *id;
0148
0149 struct {
0150
0151
0152
0153
0154 size_t pci[ 3 ];
0155
0156
0157
0158
0159 size_t pcs[ 3 ];
0160
0161
0162
0163
0164 bool in_action_loop;
0165
0166
0167
0168
0169 size_t index;
0170
0171
0172
0173
0174 RtemsSchedulerReqIdentByProcessor_Entry entry;
0175
0176
0177
0178
0179
0180 bool skip;
0181 } Map;
0182 } RtemsSchedulerReqIdentByProcessor_Context;
0183
0184 static RtemsSchedulerReqIdentByProcessor_Context
0185 RtemsSchedulerReqIdentByProcessor_Instance;
0186
0187 static const char * const RtemsSchedulerReqIdentByProcessor_PreDesc_CPUOwnedByScheduler[] = {
0188 "Yes",
0189 "No",
0190 "NA"
0191 };
0192
0193 static const char * const RtemsSchedulerReqIdentByProcessor_PreDesc_CPUIndex[] = {
0194 "Invalid",
0195 "Valid",
0196 "NA"
0197 };
0198
0199 static const char * const RtemsSchedulerReqIdentByProcessor_PreDesc_Id[] = {
0200 "Valid",
0201 "Null",
0202 "NA"
0203 };
0204
0205 static const char * const * const RtemsSchedulerReqIdentByProcessor_PreDesc[] = {
0206 RtemsSchedulerReqIdentByProcessor_PreDesc_CPUOwnedByScheduler,
0207 RtemsSchedulerReqIdentByProcessor_PreDesc_CPUIndex,
0208 RtemsSchedulerReqIdentByProcessor_PreDesc_Id,
0209 NULL
0210 };
0211
0212 static void RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_Prepare(
0213 RtemsSchedulerReqIdentByProcessor_Context *ctx,
0214 RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler state
0215 )
0216 {
0217 switch ( state ) {
0218 case RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_Yes: {
0219
0220
0221
0222
0223 ctx->cpu_has_scheduler = true;
0224 break;
0225 }
0226
0227 case RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_No: {
0228
0229
0230
0231
0232 ctx->cpu_has_scheduler = false;
0233 break;
0234 }
0235
0236 case RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_NA:
0237 break;
0238 }
0239 }
0240
0241 static void RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex_Prepare(
0242 RtemsSchedulerReqIdentByProcessor_Context *ctx,
0243 RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex state
0244 )
0245 {
0246 switch ( state ) {
0247 case RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex_Invalid: {
0248
0249
0250
0251
0252 ctx->cpu_index = rtems_scheduler_get_processor_maximum();
0253 break;
0254 }
0255
0256 case RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex_Valid: {
0257
0258
0259
0260 if ( ctx->cpu_has_scheduler ) {
0261 ctx->cpu_index = 0;
0262 } else {
0263 ctx->cpu_index = 1;
0264 }
0265 break;
0266 }
0267
0268 case RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex_NA:
0269 break;
0270 }
0271 }
0272
0273 static void RtemsSchedulerReqIdentByProcessor_Pre_Id_Prepare(
0274 RtemsSchedulerReqIdentByProcessor_Context *ctx,
0275 RtemsSchedulerReqIdentByProcessor_Pre_Id state
0276 )
0277 {
0278 switch ( state ) {
0279 case RtemsSchedulerReqIdentByProcessor_Pre_Id_Valid: {
0280
0281
0282
0283 ctx->id_value = INVALID_ID;
0284 ctx->id = &ctx->id_value;
0285 break;
0286 }
0287
0288 case RtemsSchedulerReqIdentByProcessor_Pre_Id_Null: {
0289
0290
0291
0292 ctx->id = NULL;
0293 break;
0294 }
0295
0296 case RtemsSchedulerReqIdentByProcessor_Pre_Id_NA:
0297 break;
0298 }
0299 }
0300
0301 static void RtemsSchedulerReqIdentByProcessor_Post_Status_Check(
0302 RtemsSchedulerReqIdentByProcessor_Context *ctx,
0303 RtemsSchedulerReqIdentByProcessor_Post_Status state
0304 )
0305 {
0306 switch ( state ) {
0307 case RtemsSchedulerReqIdentByProcessor_Post_Status_Ok: {
0308
0309
0310
0311
0312 T_rsc_success( ctx->status );
0313 break;
0314 }
0315
0316 case RtemsSchedulerReqIdentByProcessor_Post_Status_InvAddr: {
0317
0318
0319
0320
0321 T_rsc( ctx->status, RTEMS_INVALID_ADDRESS );
0322 break;
0323 }
0324
0325 case RtemsSchedulerReqIdentByProcessor_Post_Status_InvName: {
0326
0327
0328
0329
0330 T_rsc( ctx->status, RTEMS_INVALID_NAME );
0331 break;
0332 }
0333
0334 case RtemsSchedulerReqIdentByProcessor_Post_Status_IncStat: {
0335
0336
0337
0338
0339 T_rsc( ctx->status, RTEMS_INCORRECT_STATE );
0340 break;
0341 }
0342
0343 case RtemsSchedulerReqIdentByProcessor_Post_Status_NA:
0344 break;
0345 }
0346 }
0347
0348 static void RtemsSchedulerReqIdentByProcessor_Post_IdVar_Check(
0349 RtemsSchedulerReqIdentByProcessor_Context *ctx,
0350 RtemsSchedulerReqIdentByProcessor_Post_IdVar state
0351 )
0352 {
0353 switch ( state ) {
0354 case RtemsSchedulerReqIdentByProcessor_Post_IdVar_Set: {
0355
0356
0357
0358
0359
0360
0361 T_eq_ptr( ctx->id, &ctx->id_value );
0362 T_eq_u32( ctx->id_value, 0x0f010001 );
0363 break;
0364 }
0365
0366 case RtemsSchedulerReqIdentByProcessor_Post_IdVar_Nop: {
0367
0368
0369
0370
0371
0372 T_eq_u32( ctx->id_value, INVALID_ID );
0373 break;
0374 }
0375
0376 case RtemsSchedulerReqIdentByProcessor_Post_IdVar_NA:
0377 break;
0378 }
0379 }
0380
0381 static void RtemsSchedulerReqIdentByProcessor_Setup(
0382 RtemsSchedulerReqIdentByProcessor_Context *ctx
0383 )
0384 {
0385 #if defined(RTEMS_SMP)
0386 rtems_status_code sc;
0387
0388 sc = rtems_scheduler_ident(
0389 TEST_SCHEDULER_B_NAME,
0390 &ctx->second_scheduler_id
0391 );
0392 T_rsc_success( sc );
0393 #else
0394 ctx->second_scheduler_id = INVALID_ID;
0395 #endif
0396 }
0397
0398 static void RtemsSchedulerReqIdentByProcessor_Setup_Wrap( void *arg )
0399 {
0400 RtemsSchedulerReqIdentByProcessor_Context *ctx;
0401
0402 ctx = arg;
0403 ctx->Map.in_action_loop = false;
0404 RtemsSchedulerReqIdentByProcessor_Setup( ctx );
0405 }
0406
0407 static void RtemsSchedulerReqIdentByProcessor_Prepare(
0408 RtemsSchedulerReqIdentByProcessor_Context *ctx
0409 )
0410 {
0411 ctx->id_value = INVALID_ID;
0412 }
0413
0414 static void RtemsSchedulerReqIdentByProcessor_Action(
0415 RtemsSchedulerReqIdentByProcessor_Context *ctx
0416 )
0417 {
0418 #if defined(RTEMS_SMP)
0419 rtems_status_code sc;
0420
0421 if ( !ctx->cpu_has_scheduler ) {
0422 sc = rtems_scheduler_remove_processor( ctx->second_scheduler_id, 1 );
0423 T_rsc_success( sc );
0424 }
0425 #endif
0426
0427 ctx->status = rtems_scheduler_ident_by_processor( ctx->cpu_index, ctx->id );
0428
0429 #if defined(RTEMS_SMP)
0430 if ( !ctx->cpu_has_scheduler ) {
0431 sc = rtems_scheduler_add_processor( ctx->second_scheduler_id, 1 );
0432 T_rsc_success( sc );
0433 }
0434 #endif
0435 }
0436
0437 static const RtemsSchedulerReqIdentByProcessor_Entry
0438 RtemsSchedulerReqIdentByProcessor_Entries[] = {
0439 { 0, 1, 0, 0, RtemsSchedulerReqIdentByProcessor_Post_Status_InvName,
0440 RtemsSchedulerReqIdentByProcessor_Post_IdVar_Nop },
0441 { 0, 1, 0, 0, RtemsSchedulerReqIdentByProcessor_Post_Status_InvAddr,
0442 RtemsSchedulerReqIdentByProcessor_Post_IdVar_Nop },
0443 { 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessor_Post_Status_Ok,
0444 RtemsSchedulerReqIdentByProcessor_Post_IdVar_Set },
0445 { 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessor_Post_Status_InvAddr,
0446 RtemsSchedulerReqIdentByProcessor_Post_IdVar_Nop },
0447 #if defined(RTEMS_SMP)
0448 { 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessor_Post_Status_IncStat,
0449 RtemsSchedulerReqIdentByProcessor_Post_IdVar_Nop },
0450 #else
0451 { 1, 0, 0, 0, RtemsSchedulerReqIdentByProcessor_Post_Status_NA,
0452 RtemsSchedulerReqIdentByProcessor_Post_IdVar_NA },
0453 #endif
0454 #if defined(RTEMS_SMP)
0455 { 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessor_Post_Status_InvAddr,
0456 RtemsSchedulerReqIdentByProcessor_Post_IdVar_Nop }
0457 #else
0458 { 1, 0, 0, 0, RtemsSchedulerReqIdentByProcessor_Post_Status_NA,
0459 RtemsSchedulerReqIdentByProcessor_Post_IdVar_NA }
0460 #endif
0461 };
0462
0463 static const uint8_t
0464 RtemsSchedulerReqIdentByProcessor_Map[] = {
0465 0, 1, 2, 3, 0, 1, 4, 5
0466 };
0467
0468 static size_t RtemsSchedulerReqIdentByProcessor_Scope(
0469 void *arg,
0470 char *buf,
0471 size_t n
0472 )
0473 {
0474 RtemsSchedulerReqIdentByProcessor_Context *ctx;
0475
0476 ctx = arg;
0477
0478 if ( ctx->Map.in_action_loop ) {
0479 return T_get_scope(
0480 RtemsSchedulerReqIdentByProcessor_PreDesc,
0481 buf,
0482 n,
0483 ctx->Map.pcs
0484 );
0485 }
0486
0487 return 0;
0488 }
0489
0490 static T_fixture RtemsSchedulerReqIdentByProcessor_Fixture = {
0491 .setup = RtemsSchedulerReqIdentByProcessor_Setup_Wrap,
0492 .stop = NULL,
0493 .teardown = NULL,
0494 .scope = RtemsSchedulerReqIdentByProcessor_Scope,
0495 .initial_context = &RtemsSchedulerReqIdentByProcessor_Instance
0496 };
0497
0498 static inline RtemsSchedulerReqIdentByProcessor_Entry
0499 RtemsSchedulerReqIdentByProcessor_PopEntry(
0500 RtemsSchedulerReqIdentByProcessor_Context *ctx
0501 )
0502 {
0503 size_t index;
0504
0505 index = ctx->Map.index;
0506 ctx->Map.index = index + 1;
0507 return RtemsSchedulerReqIdentByProcessor_Entries[
0508 RtemsSchedulerReqIdentByProcessor_Map[ index ]
0509 ];
0510 }
0511
0512 static void RtemsSchedulerReqIdentByProcessor_SetPreConditionStates(
0513 RtemsSchedulerReqIdentByProcessor_Context *ctx
0514 )
0515 {
0516 if ( ctx->Map.entry.Pre_CPUOwnedByScheduler_NA ) {
0517 ctx->Map.pcs[ 0 ] = RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_NA;
0518 } else {
0519 ctx->Map.pcs[ 0 ] = ctx->Map.pci[ 0 ];
0520 }
0521
0522 ctx->Map.pcs[ 1 ] = ctx->Map.pci[ 1 ];
0523 ctx->Map.pcs[ 2 ] = ctx->Map.pci[ 2 ];
0524 }
0525
0526 static void RtemsSchedulerReqIdentByProcessor_TestVariant(
0527 RtemsSchedulerReqIdentByProcessor_Context *ctx
0528 )
0529 {
0530 RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_Prepare(
0531 ctx,
0532 ctx->Map.pcs[ 0 ]
0533 );
0534 RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex_Prepare(
0535 ctx,
0536 ctx->Map.pcs[ 1 ]
0537 );
0538 RtemsSchedulerReqIdentByProcessor_Pre_Id_Prepare( ctx, ctx->Map.pcs[ 2 ] );
0539 RtemsSchedulerReqIdentByProcessor_Action( ctx );
0540 RtemsSchedulerReqIdentByProcessor_Post_Status_Check(
0541 ctx,
0542 ctx->Map.entry.Post_Status
0543 );
0544 RtemsSchedulerReqIdentByProcessor_Post_IdVar_Check(
0545 ctx,
0546 ctx->Map.entry.Post_IdVar
0547 );
0548 }
0549
0550
0551
0552
0553 T_TEST_CASE_FIXTURE(
0554 RtemsSchedulerReqIdentByProcessor,
0555 &RtemsSchedulerReqIdentByProcessor_Fixture
0556 )
0557 {
0558 RtemsSchedulerReqIdentByProcessor_Context *ctx;
0559
0560 ctx = T_fixture_context();
0561 ctx->Map.in_action_loop = true;
0562 ctx->Map.index = 0;
0563
0564 for (
0565 ctx->Map.pci[ 0 ] = RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_Yes;
0566 ctx->Map.pci[ 0 ] < RtemsSchedulerReqIdentByProcessor_Pre_CPUOwnedByScheduler_NA;
0567 ++ctx->Map.pci[ 0 ]
0568 ) {
0569 for (
0570 ctx->Map.pci[ 1 ] = RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex_Invalid;
0571 ctx->Map.pci[ 1 ] < RtemsSchedulerReqIdentByProcessor_Pre_CPUIndex_NA;
0572 ++ctx->Map.pci[ 1 ]
0573 ) {
0574 for (
0575 ctx->Map.pci[ 2 ] = RtemsSchedulerReqIdentByProcessor_Pre_Id_Valid;
0576 ctx->Map.pci[ 2 ] < RtemsSchedulerReqIdentByProcessor_Pre_Id_NA;
0577 ++ctx->Map.pci[ 2 ]
0578 ) {
0579 ctx->Map.entry = RtemsSchedulerReqIdentByProcessor_PopEntry( ctx );
0580
0581 if ( ctx->Map.entry.Skip ) {
0582 continue;
0583 }
0584
0585 RtemsSchedulerReqIdentByProcessor_SetPreConditionStates( ctx );
0586 RtemsSchedulerReqIdentByProcessor_Prepare( ctx );
0587 RtemsSchedulerReqIdentByProcessor_TestVariant( ctx );
0588 }
0589 }
0590 }
0591 }
0592
0593