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0051 #ifdef HAVE_CONFIG_H
0052 #include "config.h"
0053 #endif
0054
0055 #include <rtems.h>
0056
0057 #include "ts-config.h"
0058 #include "tx-support.h"
0059
0060 #include <rtems/test.h>
0061
0062
0063
0064
0065
0066
0067
0068
0069
0070
0071 typedef enum {
0072 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_Yes,
0073 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_No,
0074 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_NA
0075 } RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler;
0076
0077 typedef enum {
0078 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj_Invalid,
0079 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj_Valid,
0080 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj_NA
0081 } RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj;
0082
0083 typedef enum {
0084 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize_Valid,
0085 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize_Invalid,
0086 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize_NA
0087 } RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize;
0088
0089 typedef enum {
0090 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet_Valid,
0091 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet_Null,
0092 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet_NA
0093 } RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet;
0094
0095 typedef enum {
0096 RtemsSchedulerReqIdentByProcessorSet_Pre_Id_Valid,
0097 RtemsSchedulerReqIdentByProcessorSet_Pre_Id_Null,
0098 RtemsSchedulerReqIdentByProcessorSet_Pre_Id_NA
0099 } RtemsSchedulerReqIdentByProcessorSet_Pre_Id;
0100
0101 typedef enum {
0102 RtemsSchedulerReqIdentByProcessorSet_Post_Status_Ok,
0103 RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvAddr,
0104 RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvSize,
0105 RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvName,
0106 RtemsSchedulerReqIdentByProcessorSet_Post_Status_IncStat,
0107 RtemsSchedulerReqIdentByProcessorSet_Post_Status_NA
0108 } RtemsSchedulerReqIdentByProcessorSet_Post_Status;
0109
0110 typedef enum {
0111 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Set,
0112 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Nop,
0113 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_NA
0114 } RtemsSchedulerReqIdentByProcessorSet_Post_IdVar;
0115
0116 typedef struct {
0117 uint16_t Skip : 1;
0118 uint16_t Pre_CPUOwnedByScheduler_NA : 1;
0119 uint16_t Pre_CPUSetObj_NA : 1;
0120 uint16_t Pre_CPUSetSize_NA : 1;
0121 uint16_t Pre_CPUSet_NA : 1;
0122 uint16_t Pre_Id_NA : 1;
0123 uint16_t Post_Status : 3;
0124 uint16_t Post_IdVar : 2;
0125 } RtemsSchedulerReqIdentByProcessorSet_Entry;
0126
0127
0128
0129
0130
0131 typedef struct {
0132
0133
0134
0135 rtems_id second_scheduler_id;
0136
0137
0138
0139
0140
0141 cpu_set_t cpuset_value;
0142
0143
0144
0145
0146 rtems_id id_value;
0147
0148
0149
0150
0151
0152 bool cpu_has_scheduler;
0153
0154
0155
0156
0157
0158 rtems_status_code status;
0159
0160
0161
0162
0163 size_t cpusetsize;
0164
0165
0166
0167
0168 const cpu_set_t *cpuset;
0169
0170
0171
0172
0173 rtems_id *id;
0174
0175 struct {
0176
0177
0178
0179
0180 size_t pci[ 5 ];
0181
0182
0183
0184
0185 size_t pcs[ 5 ];
0186
0187
0188
0189
0190 bool in_action_loop;
0191
0192
0193
0194
0195 size_t index;
0196
0197
0198
0199
0200 RtemsSchedulerReqIdentByProcessorSet_Entry entry;
0201
0202
0203
0204
0205
0206 bool skip;
0207 } Map;
0208 } RtemsSchedulerReqIdentByProcessorSet_Context;
0209
0210 static RtemsSchedulerReqIdentByProcessorSet_Context
0211 RtemsSchedulerReqIdentByProcessorSet_Instance;
0212
0213 static const char * const RtemsSchedulerReqIdentByProcessorSet_PreDesc_CPUOwnedByScheduler[] = {
0214 "Yes",
0215 "No",
0216 "NA"
0217 };
0218
0219 static const char * const RtemsSchedulerReqIdentByProcessorSet_PreDesc_CPUSetObj[] = {
0220 "Invalid",
0221 "Valid",
0222 "NA"
0223 };
0224
0225 static const char * const RtemsSchedulerReqIdentByProcessorSet_PreDesc_CPUSetSize[] = {
0226 "Valid",
0227 "Invalid",
0228 "NA"
0229 };
0230
0231 static const char * const RtemsSchedulerReqIdentByProcessorSet_PreDesc_CPUSet[] = {
0232 "Valid",
0233 "Null",
0234 "NA"
0235 };
0236
0237 static const char * const RtemsSchedulerReqIdentByProcessorSet_PreDesc_Id[] = {
0238 "Valid",
0239 "Null",
0240 "NA"
0241 };
0242
0243 static const char * const * const RtemsSchedulerReqIdentByProcessorSet_PreDesc[] = {
0244 RtemsSchedulerReqIdentByProcessorSet_PreDesc_CPUOwnedByScheduler,
0245 RtemsSchedulerReqIdentByProcessorSet_PreDesc_CPUSetObj,
0246 RtemsSchedulerReqIdentByProcessorSet_PreDesc_CPUSetSize,
0247 RtemsSchedulerReqIdentByProcessorSet_PreDesc_CPUSet,
0248 RtemsSchedulerReqIdentByProcessorSet_PreDesc_Id,
0249 NULL
0250 };
0251
0252 static void
0253 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_Prepare(
0254 RtemsSchedulerReqIdentByProcessorSet_Context *ctx,
0255 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler state
0256 )
0257 {
0258 switch ( state ) {
0259 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_Yes: {
0260
0261
0262
0263
0264 ctx->cpu_has_scheduler = true;
0265 break;
0266 }
0267
0268 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_No: {
0269
0270
0271
0272
0273 ctx->cpu_has_scheduler = false;
0274 break;
0275 }
0276
0277 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_NA:
0278 break;
0279 }
0280 }
0281
0282 static void RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj_Prepare(
0283 RtemsSchedulerReqIdentByProcessorSet_Context *ctx,
0284 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj state
0285 )
0286 {
0287 switch ( state ) {
0288 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj_Invalid: {
0289
0290
0291
0292 CPU_ZERO( &ctx->cpuset_value );
0293 break;
0294 }
0295
0296 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj_Valid: {
0297
0298
0299
0300 CPU_ZERO( &ctx->cpuset_value );
0301
0302 if ( ctx->cpu_has_scheduler ) {
0303 CPU_SET( 0, &ctx->cpuset_value );
0304 } else {
0305 CPU_SET( 1, &ctx->cpuset_value );
0306 }
0307 break;
0308 }
0309
0310 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj_NA:
0311 break;
0312 }
0313 }
0314
0315 static void RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize_Prepare(
0316 RtemsSchedulerReqIdentByProcessorSet_Context *ctx,
0317 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize state
0318 )
0319 {
0320 switch ( state ) {
0321 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize_Valid: {
0322
0323
0324
0325
0326 ctx->cpusetsize = sizeof( ctx->cpuset_value );
0327 break;
0328 }
0329
0330 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize_Invalid: {
0331
0332
0333
0334
0335 ctx->cpusetsize = 1;
0336 break;
0337 }
0338
0339 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize_NA:
0340 break;
0341 }
0342 }
0343
0344 static void RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet_Prepare(
0345 RtemsSchedulerReqIdentByProcessorSet_Context *ctx,
0346 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet state
0347 )
0348 {
0349 switch ( state ) {
0350 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet_Valid: {
0351
0352
0353
0354 ctx->cpuset = &ctx->cpuset_value;
0355 break;
0356 }
0357
0358 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet_Null: {
0359
0360
0361
0362 ctx->cpuset = NULL;
0363 break;
0364 }
0365
0366 case RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet_NA:
0367 break;
0368 }
0369 }
0370
0371 static void RtemsSchedulerReqIdentByProcessorSet_Pre_Id_Prepare(
0372 RtemsSchedulerReqIdentByProcessorSet_Context *ctx,
0373 RtemsSchedulerReqIdentByProcessorSet_Pre_Id state
0374 )
0375 {
0376 switch ( state ) {
0377 case RtemsSchedulerReqIdentByProcessorSet_Pre_Id_Valid: {
0378
0379
0380
0381 ctx->id_value = INVALID_ID;
0382 ctx->id = &ctx->id_value;
0383 break;
0384 }
0385
0386 case RtemsSchedulerReqIdentByProcessorSet_Pre_Id_Null: {
0387
0388
0389
0390 ctx->id = NULL;
0391 break;
0392 }
0393
0394 case RtemsSchedulerReqIdentByProcessorSet_Pre_Id_NA:
0395 break;
0396 }
0397 }
0398
0399 static void RtemsSchedulerReqIdentByProcessorSet_Post_Status_Check(
0400 RtemsSchedulerReqIdentByProcessorSet_Context *ctx,
0401 RtemsSchedulerReqIdentByProcessorSet_Post_Status state
0402 )
0403 {
0404 switch ( state ) {
0405 case RtemsSchedulerReqIdentByProcessorSet_Post_Status_Ok: {
0406
0407
0408
0409
0410 T_rsc_success( ctx->status );
0411 break;
0412 }
0413
0414 case RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvAddr: {
0415
0416
0417
0418
0419 T_rsc( ctx->status, RTEMS_INVALID_ADDRESS );
0420 break;
0421 }
0422
0423 case RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvSize: {
0424
0425
0426
0427
0428 T_rsc( ctx->status, RTEMS_INVALID_SIZE );
0429 break;
0430 }
0431
0432 case RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvName: {
0433
0434
0435
0436
0437 T_rsc( ctx->status, RTEMS_INVALID_NAME );
0438 break;
0439 }
0440
0441 case RtemsSchedulerReqIdentByProcessorSet_Post_Status_IncStat: {
0442
0443
0444
0445
0446 T_rsc( ctx->status, RTEMS_INCORRECT_STATE );
0447 break;
0448 }
0449
0450 case RtemsSchedulerReqIdentByProcessorSet_Post_Status_NA:
0451 break;
0452 }
0453 }
0454
0455 static void RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Check(
0456 RtemsSchedulerReqIdentByProcessorSet_Context *ctx,
0457 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar state
0458 )
0459 {
0460 switch ( state ) {
0461 case RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Set: {
0462
0463
0464
0465
0466
0467
0468
0469 T_eq_u32( ctx->id_value, 0x0f010001 );
0470 break;
0471 }
0472
0473 case RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Nop: {
0474
0475
0476
0477
0478
0479 T_eq_u32( ctx->id_value, INVALID_ID );
0480 break;
0481 }
0482
0483 case RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_NA:
0484 break;
0485 }
0486 }
0487
0488 static void RtemsSchedulerReqIdentByProcessorSet_Setup(
0489 RtemsSchedulerReqIdentByProcessorSet_Context *ctx
0490 )
0491 {
0492 #if defined(RTEMS_SMP)
0493 rtems_status_code sc;
0494
0495 sc = rtems_scheduler_ident(
0496 TEST_SCHEDULER_B_NAME,
0497 &ctx->second_scheduler_id
0498 );
0499 T_rsc_success( sc );
0500 #else
0501 ctx->second_scheduler_id = INVALID_ID;
0502 #endif
0503 }
0504
0505 static void RtemsSchedulerReqIdentByProcessorSet_Setup_Wrap( void *arg )
0506 {
0507 RtemsSchedulerReqIdentByProcessorSet_Context *ctx;
0508
0509 ctx = arg;
0510 ctx->Map.in_action_loop = false;
0511 RtemsSchedulerReqIdentByProcessorSet_Setup( ctx );
0512 }
0513
0514 static void RtemsSchedulerReqIdentByProcessorSet_Prepare(
0515 RtemsSchedulerReqIdentByProcessorSet_Context *ctx
0516 )
0517 {
0518 ctx->id_value = INVALID_ID;
0519 }
0520
0521 static void RtemsSchedulerReqIdentByProcessorSet_Action(
0522 RtemsSchedulerReqIdentByProcessorSet_Context *ctx
0523 )
0524 {
0525 #if defined(RTEMS_SMP)
0526 rtems_status_code sc;
0527
0528 if ( !ctx->cpu_has_scheduler ) {
0529 sc = rtems_scheduler_remove_processor( ctx->second_scheduler_id, 1 );
0530 T_rsc_success( sc );
0531 }
0532 #endif
0533
0534 ctx->status = rtems_scheduler_ident_by_processor_set(
0535 ctx->cpusetsize,
0536 ctx->cpuset,
0537 ctx->id
0538 );
0539
0540 #if defined(RTEMS_SMP)
0541 if ( !ctx->cpu_has_scheduler ) {
0542 sc = rtems_scheduler_add_processor( ctx->second_scheduler_id, 1 );
0543 T_rsc_success( sc );
0544 }
0545 #endif
0546 }
0547
0548 static const RtemsSchedulerReqIdentByProcessorSet_Entry
0549 RtemsSchedulerReqIdentByProcessorSet_Entries[] = {
0550 { 0, 1, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvAddr,
0551 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Nop },
0552 { 0, 0, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvAddr,
0553 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Nop },
0554 #if defined(RTEMS_SMP)
0555 { 0, 0, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvAddr,
0556 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Nop },
0557 #else
0558 { 1, 0, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_NA,
0559 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_NA },
0560 #endif
0561 { 0, 1, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvName,
0562 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Nop },
0563 { 0, 1, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvSize,
0564 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Nop },
0565 { 0, 0, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_Ok,
0566 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Set },
0567 { 0, 0, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvSize,
0568 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Nop },
0569 #if defined(RTEMS_SMP)
0570 { 0, 0, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_IncStat,
0571 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Nop },
0572 #else
0573 { 1, 0, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_NA,
0574 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_NA },
0575 #endif
0576 #if defined(RTEMS_SMP)
0577 { 0, 0, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_InvSize,
0578 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Nop }
0579 #else
0580 { 1, 0, 0, 0, 0, 0, RtemsSchedulerReqIdentByProcessorSet_Post_Status_NA,
0581 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_NA }
0582 #endif
0583 };
0584
0585 static const uint8_t
0586 RtemsSchedulerReqIdentByProcessorSet_Map[] = {
0587 3, 0, 0, 0, 4, 0, 0, 0, 5, 1, 1, 1, 6, 1, 1, 1, 3, 0, 0, 0, 4, 0, 0, 0, 7, 2,
0588 2, 2, 8, 2, 2, 2
0589 };
0590
0591 static size_t RtemsSchedulerReqIdentByProcessorSet_Scope(
0592 void *arg,
0593 char *buf,
0594 size_t n
0595 )
0596 {
0597 RtemsSchedulerReqIdentByProcessorSet_Context *ctx;
0598
0599 ctx = arg;
0600
0601 if ( ctx->Map.in_action_loop ) {
0602 return T_get_scope(
0603 RtemsSchedulerReqIdentByProcessorSet_PreDesc,
0604 buf,
0605 n,
0606 ctx->Map.pcs
0607 );
0608 }
0609
0610 return 0;
0611 }
0612
0613 static T_fixture RtemsSchedulerReqIdentByProcessorSet_Fixture = {
0614 .setup = RtemsSchedulerReqIdentByProcessorSet_Setup_Wrap,
0615 .stop = NULL,
0616 .teardown = NULL,
0617 .scope = RtemsSchedulerReqIdentByProcessorSet_Scope,
0618 .initial_context = &RtemsSchedulerReqIdentByProcessorSet_Instance
0619 };
0620
0621 static inline RtemsSchedulerReqIdentByProcessorSet_Entry
0622 RtemsSchedulerReqIdentByProcessorSet_PopEntry(
0623 RtemsSchedulerReqIdentByProcessorSet_Context *ctx
0624 )
0625 {
0626 size_t index;
0627
0628 index = ctx->Map.index;
0629 ctx->Map.index = index + 1;
0630 return RtemsSchedulerReqIdentByProcessorSet_Entries[
0631 RtemsSchedulerReqIdentByProcessorSet_Map[ index ]
0632 ];
0633 }
0634
0635 static void RtemsSchedulerReqIdentByProcessorSet_SetPreConditionStates(
0636 RtemsSchedulerReqIdentByProcessorSet_Context *ctx
0637 )
0638 {
0639 if ( ctx->Map.entry.Pre_CPUOwnedByScheduler_NA ) {
0640 ctx->Map.pcs[ 0 ] = RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_NA;
0641 } else {
0642 ctx->Map.pcs[ 0 ] = ctx->Map.pci[ 0 ];
0643 }
0644
0645 ctx->Map.pcs[ 1 ] = ctx->Map.pci[ 1 ];
0646 ctx->Map.pcs[ 2 ] = ctx->Map.pci[ 2 ];
0647 ctx->Map.pcs[ 3 ] = ctx->Map.pci[ 3 ];
0648 ctx->Map.pcs[ 4 ] = ctx->Map.pci[ 4 ];
0649 }
0650
0651 static void RtemsSchedulerReqIdentByProcessorSet_TestVariant(
0652 RtemsSchedulerReqIdentByProcessorSet_Context *ctx
0653 )
0654 {
0655 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_Prepare(
0656 ctx,
0657 ctx->Map.pcs[ 0 ]
0658 );
0659 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj_Prepare(
0660 ctx,
0661 ctx->Map.pcs[ 1 ]
0662 );
0663 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize_Prepare(
0664 ctx,
0665 ctx->Map.pcs[ 2 ]
0666 );
0667 RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet_Prepare(
0668 ctx,
0669 ctx->Map.pcs[ 3 ]
0670 );
0671 RtemsSchedulerReqIdentByProcessorSet_Pre_Id_Prepare(
0672 ctx,
0673 ctx->Map.pcs[ 4 ]
0674 );
0675 RtemsSchedulerReqIdentByProcessorSet_Action( ctx );
0676 RtemsSchedulerReqIdentByProcessorSet_Post_Status_Check(
0677 ctx,
0678 ctx->Map.entry.Post_Status
0679 );
0680 RtemsSchedulerReqIdentByProcessorSet_Post_IdVar_Check(
0681 ctx,
0682 ctx->Map.entry.Post_IdVar
0683 );
0684 }
0685
0686
0687
0688
0689 T_TEST_CASE_FIXTURE(
0690 RtemsSchedulerReqIdentByProcessorSet,
0691 &RtemsSchedulerReqIdentByProcessorSet_Fixture
0692 )
0693 {
0694 RtemsSchedulerReqIdentByProcessorSet_Context *ctx;
0695
0696 ctx = T_fixture_context();
0697 ctx->Map.in_action_loop = true;
0698 ctx->Map.index = 0;
0699
0700 for (
0701 ctx->Map.pci[ 0 ] = RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_Yes;
0702 ctx->Map.pci[ 0 ] < RtemsSchedulerReqIdentByProcessorSet_Pre_CPUOwnedByScheduler_NA;
0703 ++ctx->Map.pci[ 0 ]
0704 ) {
0705 for (
0706 ctx->Map.pci[ 1 ] = RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj_Invalid;
0707 ctx->Map.pci[ 1 ] < RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetObj_NA;
0708 ++ctx->Map.pci[ 1 ]
0709 ) {
0710 for (
0711 ctx->Map.pci[ 2 ] = RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize_Valid;
0712 ctx->Map.pci[ 2 ] < RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSetSize_NA;
0713 ++ctx->Map.pci[ 2 ]
0714 ) {
0715 for (
0716 ctx->Map.pci[ 3 ] = RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet_Valid;
0717 ctx->Map.pci[ 3 ] < RtemsSchedulerReqIdentByProcessorSet_Pre_CPUSet_NA;
0718 ++ctx->Map.pci[ 3 ]
0719 ) {
0720 for (
0721 ctx->Map.pci[ 4 ] = RtemsSchedulerReqIdentByProcessorSet_Pre_Id_Valid;
0722 ctx->Map.pci[ 4 ] < RtemsSchedulerReqIdentByProcessorSet_Pre_Id_NA;
0723 ++ctx->Map.pci[ 4 ]
0724 ) {
0725 ctx->Map.entry = RtemsSchedulerReqIdentByProcessorSet_PopEntry(
0726 ctx
0727 );
0728
0729 if ( ctx->Map.entry.Skip ) {
0730 continue;
0731 }
0732
0733 RtemsSchedulerReqIdentByProcessorSet_SetPreConditionStates( ctx );
0734 RtemsSchedulerReqIdentByProcessorSet_Prepare( ctx );
0735 RtemsSchedulerReqIdentByProcessorSet_TestVariant( ctx );
0736 }
0737 }
0738 }
0739 }
0740 }
0741 }
0742
0743