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0051 #ifdef HAVE_CONFIG_H
0052 #include "config.h"
0053 #endif
0054
0055 #include <rtems.h>
0056 #include <rtems/test-scheduler.h>
0057 #include <rtems/score/percpu.h>
0058
0059 #include "ts-config.h"
0060 #include "tx-support.h"
0061
0062 #include <rtems/test.h>
0063
0064
0065
0066
0067
0068
0069
0070
0071
0072
0073 typedef enum {
0074 RtemsSchedulerReqAddProcessor_Pre_HasReady_Ready,
0075 RtemsSchedulerReqAddProcessor_Pre_HasReady_Empty,
0076 RtemsSchedulerReqAddProcessor_Pre_HasReady_NA
0077 } RtemsSchedulerReqAddProcessor_Pre_HasReady;
0078
0079 typedef enum {
0080 RtemsSchedulerReqAddProcessor_Pre_Id_Invalid,
0081 RtemsSchedulerReqAddProcessor_Pre_Id_Scheduler,
0082 RtemsSchedulerReqAddProcessor_Pre_Id_NA
0083 } RtemsSchedulerReqAddProcessor_Pre_Id;
0084
0085 typedef enum {
0086 RtemsSchedulerReqAddProcessor_Pre_CPUIndex_Valid,
0087 RtemsSchedulerReqAddProcessor_Pre_CPUIndex_Invalid,
0088 RtemsSchedulerReqAddProcessor_Pre_CPUIndex_NA
0089 } RtemsSchedulerReqAddProcessor_Pre_CPUIndex;
0090
0091 typedef enum {
0092 RtemsSchedulerReqAddProcessor_Pre_CPUState_Idle,
0093 RtemsSchedulerReqAddProcessor_Pre_CPUState_InUse,
0094 RtemsSchedulerReqAddProcessor_Pre_CPUState_NotOnline,
0095 RtemsSchedulerReqAddProcessor_Pre_CPUState_NotUsable,
0096 RtemsSchedulerReqAddProcessor_Pre_CPUState_NA
0097 } RtemsSchedulerReqAddProcessor_Pre_CPUState;
0098
0099 typedef enum {
0100 RtemsSchedulerReqAddProcessor_Post_Status_Ok,
0101 RtemsSchedulerReqAddProcessor_Post_Status_InvId,
0102 RtemsSchedulerReqAddProcessor_Post_Status_NotConf,
0103 RtemsSchedulerReqAddProcessor_Post_Status_IncStat,
0104 RtemsSchedulerReqAddProcessor_Post_Status_InUse,
0105 RtemsSchedulerReqAddProcessor_Post_Status_NA
0106 } RtemsSchedulerReqAddProcessor_Post_Status;
0107
0108 typedef enum {
0109 RtemsSchedulerReqAddProcessor_Post_Added_Yes,
0110 RtemsSchedulerReqAddProcessor_Post_Added_Nop,
0111 RtemsSchedulerReqAddProcessor_Post_Added_NA
0112 } RtemsSchedulerReqAddProcessor_Post_Added;
0113
0114 typedef struct {
0115 uint16_t Skip : 1;
0116 uint16_t Pre_HasReady_NA : 1;
0117 uint16_t Pre_Id_NA : 1;
0118 uint16_t Pre_CPUIndex_NA : 1;
0119 uint16_t Pre_CPUState_NA : 1;
0120 uint16_t Post_Status : 3;
0121 uint16_t Post_Added : 2;
0122 } RtemsSchedulerReqAddProcessor_Entry;
0123
0124
0125
0126
0127 typedef struct {
0128
0129
0130
0131 rtems_id scheduler_id;
0132
0133
0134
0135
0136 rtems_id scheduler_a_id;
0137
0138
0139
0140
0141 rtems_id scheduler_b_id;
0142
0143
0144
0145
0146 rtems_id scheduler_c_id;
0147
0148
0149
0150
0151
0152 Per_CPU_Control *cpu;
0153
0154
0155
0156
0157
0158 bool online;
0159
0160
0161
0162
0163
0164 bool add_cpu_to_scheduler_b;
0165
0166
0167
0168
0169 T_scheduler_log_2 scheduler_log;
0170
0171
0172
0173
0174
0175 rtems_status_code status;
0176
0177
0178
0179
0180 rtems_id id;
0181
0182
0183
0184
0185 uint32_t cpu_index;
0186
0187 struct {
0188
0189
0190
0191
0192 size_t pci[ 4 ];
0193
0194
0195
0196
0197 size_t pcs[ 4 ];
0198
0199
0200
0201
0202 bool in_action_loop;
0203
0204
0205
0206
0207 size_t index;
0208
0209
0210
0211
0212 RtemsSchedulerReqAddProcessor_Entry entry;
0213
0214
0215
0216
0217
0218 bool skip;
0219 } Map;
0220 } RtemsSchedulerReqAddProcessor_Context;
0221
0222 static RtemsSchedulerReqAddProcessor_Context
0223 RtemsSchedulerReqAddProcessor_Instance;
0224
0225 static const char * const RtemsSchedulerReqAddProcessor_PreDesc_HasReady[] = {
0226 "Ready",
0227 "Empty",
0228 "NA"
0229 };
0230
0231 static const char * const RtemsSchedulerReqAddProcessor_PreDesc_Id[] = {
0232 "Invalid",
0233 "Scheduler",
0234 "NA"
0235 };
0236
0237 static const char * const RtemsSchedulerReqAddProcessor_PreDesc_CPUIndex[] = {
0238 "Valid",
0239 "Invalid",
0240 "NA"
0241 };
0242
0243 static const char * const RtemsSchedulerReqAddProcessor_PreDesc_CPUState[] = {
0244 "Idle",
0245 "InUse",
0246 "NotOnline",
0247 "NotUsable",
0248 "NA"
0249 };
0250
0251 static const char * const * const RtemsSchedulerReqAddProcessor_PreDesc[] = {
0252 RtemsSchedulerReqAddProcessor_PreDesc_HasReady,
0253 RtemsSchedulerReqAddProcessor_PreDesc_Id,
0254 RtemsSchedulerReqAddProcessor_PreDesc_CPUIndex,
0255 RtemsSchedulerReqAddProcessor_PreDesc_CPUState,
0256 NULL
0257 };
0258
0259 #define CPU_TO_ADD 1
0260
0261 static void RtemsSchedulerReqAddProcessor_Pre_HasReady_Prepare(
0262 RtemsSchedulerReqAddProcessor_Context *ctx,
0263 RtemsSchedulerReqAddProcessor_Pre_HasReady state
0264 )
0265 {
0266 switch ( state ) {
0267 case RtemsSchedulerReqAddProcessor_Pre_HasReady_Ready: {
0268
0269
0270
0271 ctx->scheduler_id = ctx->scheduler_a_id;
0272 break;
0273 }
0274
0275 case RtemsSchedulerReqAddProcessor_Pre_HasReady_Empty: {
0276
0277
0278
0279 #if defined(RTEMS_SMP)
0280 ctx->scheduler_id = ctx->scheduler_c_id;
0281 #else
0282 ctx->scheduler_id = ctx->scheduler_a_id;
0283 #endif
0284 break;
0285 }
0286
0287 case RtemsSchedulerReqAddProcessor_Pre_HasReady_NA:
0288 break;
0289 }
0290 }
0291
0292 static void RtemsSchedulerReqAddProcessor_Pre_Id_Prepare(
0293 RtemsSchedulerReqAddProcessor_Context *ctx,
0294 RtemsSchedulerReqAddProcessor_Pre_Id state
0295 )
0296 {
0297 switch ( state ) {
0298 case RtemsSchedulerReqAddProcessor_Pre_Id_Invalid: {
0299
0300
0301
0302
0303 ctx->id = INVALID_ID;
0304 break;
0305 }
0306
0307 case RtemsSchedulerReqAddProcessor_Pre_Id_Scheduler: {
0308
0309
0310
0311 ctx->id = ctx->scheduler_id;
0312 break;
0313 }
0314
0315 case RtemsSchedulerReqAddProcessor_Pre_Id_NA:
0316 break;
0317 }
0318 }
0319
0320 static void RtemsSchedulerReqAddProcessor_Pre_CPUIndex_Prepare(
0321 RtemsSchedulerReqAddProcessor_Context *ctx,
0322 RtemsSchedulerReqAddProcessor_Pre_CPUIndex state
0323 )
0324 {
0325 switch ( state ) {
0326 case RtemsSchedulerReqAddProcessor_Pre_CPUIndex_Valid: {
0327
0328
0329
0330
0331 #if defined(RTEMS_SMP)
0332 ctx->cpu_index = CPU_TO_ADD;
0333 #else
0334 ctx->cpu_index = 0;
0335 #endif
0336 break;
0337 }
0338
0339 case RtemsSchedulerReqAddProcessor_Pre_CPUIndex_Invalid: {
0340
0341
0342
0343
0344 ctx->cpu_index = rtems_configuration_get_maximum_processors();
0345 break;
0346 }
0347
0348 case RtemsSchedulerReqAddProcessor_Pre_CPUIndex_NA:
0349 break;
0350 }
0351 }
0352
0353 static void RtemsSchedulerReqAddProcessor_Pre_CPUState_Prepare(
0354 RtemsSchedulerReqAddProcessor_Context *ctx,
0355 RtemsSchedulerReqAddProcessor_Pre_CPUState state
0356 )
0357 {
0358 rtems_status_code sc;
0359
0360 switch ( state ) {
0361 case RtemsSchedulerReqAddProcessor_Pre_CPUState_Idle: {
0362
0363
0364
0365
0366
0367
0368
0369 sc = rtems_scheduler_remove_processor(
0370 ctx->scheduler_b_id,
0371 CPU_TO_ADD
0372 );
0373 T_rsc_success( sc );
0374 ctx->add_cpu_to_scheduler_b = true;
0375 break;
0376 }
0377
0378 case RtemsSchedulerReqAddProcessor_Pre_CPUState_InUse: {
0379
0380
0381
0382
0383
0384 break;
0385 }
0386
0387 case RtemsSchedulerReqAddProcessor_Pre_CPUState_NotOnline: {
0388
0389
0390
0391
0392 sc = rtems_scheduler_remove_processor(
0393 ctx->scheduler_b_id,
0394 CPU_TO_ADD
0395 );
0396 T_rsc_success( sc );
0397 ctx->add_cpu_to_scheduler_b = true;
0398 #if defined(RTEMS_SMP)
0399 ctx->cpu->online = false;
0400 #endif
0401 break;
0402 }
0403
0404 case RtemsSchedulerReqAddProcessor_Pre_CPUState_NotUsable: {
0405
0406
0407
0408
0409 ctx->cpu_index = rtems_configuration_get_maximum_processors() - 1;
0410 break;
0411 }
0412
0413 case RtemsSchedulerReqAddProcessor_Pre_CPUState_NA:
0414 break;
0415 }
0416 }
0417
0418 static void RtemsSchedulerReqAddProcessor_Post_Status_Check(
0419 RtemsSchedulerReqAddProcessor_Context *ctx,
0420 RtemsSchedulerReqAddProcessor_Post_Status state
0421 )
0422 {
0423 switch ( state ) {
0424 case RtemsSchedulerReqAddProcessor_Post_Status_Ok: {
0425
0426
0427
0428
0429 T_rsc_success( ctx->status );
0430 break;
0431 }
0432
0433 case RtemsSchedulerReqAddProcessor_Post_Status_InvId: {
0434
0435
0436
0437
0438 T_rsc( ctx->status, RTEMS_INVALID_ID );
0439 break;
0440 }
0441
0442 case RtemsSchedulerReqAddProcessor_Post_Status_NotConf: {
0443
0444
0445
0446
0447 T_rsc( ctx->status, RTEMS_NOT_CONFIGURED );
0448 break;
0449 }
0450
0451 case RtemsSchedulerReqAddProcessor_Post_Status_IncStat: {
0452
0453
0454
0455
0456 T_rsc( ctx->status, RTEMS_INCORRECT_STATE );
0457 break;
0458 }
0459
0460 case RtemsSchedulerReqAddProcessor_Post_Status_InUse: {
0461
0462
0463
0464
0465 T_rsc( ctx->status, RTEMS_RESOURCE_IN_USE );
0466 break;
0467 }
0468
0469 case RtemsSchedulerReqAddProcessor_Post_Status_NA:
0470 break;
0471 }
0472 }
0473
0474 static void RtemsSchedulerReqAddProcessor_Post_Added_Check(
0475 RtemsSchedulerReqAddProcessor_Context *ctx,
0476 RtemsSchedulerReqAddProcessor_Post_Added state
0477 )
0478 {
0479 rtems_status_code sc;
0480 cpu_set_t set;
0481 rtems_task_priority priority;
0482
0483 switch ( state ) {
0484 case RtemsSchedulerReqAddProcessor_Post_Added_Yes: {
0485
0486
0487
0488
0489
0490 T_eq_sz( ctx->scheduler_log.header.recorded, 2 );
0491 T_eq_int(
0492 ctx->scheduler_log.events[ 0 ].operation,
0493 T_SCHEDULER_MAP_PRIORITY
0494 );
0495 T_eq_int(
0496 ctx->scheduler_log.events[ 1 ].operation,
0497 T_SCHEDULER_ADD_PROCESSOR
0498 );
0499
0500 priority = GetSelfPriority();
0501
0502 if ( ctx->scheduler_id == ctx->scheduler_c_id ) {
0503 SetSelfScheduler( ctx->scheduler_c_id, priority );
0504 }
0505
0506 SetSelfAffinityOne( CPU_TO_ADD );
0507 T_eq_u32( rtems_scheduler_get_processor(), CPU_TO_ADD );
0508 SetSelfAffinityAll();
0509
0510 if ( ctx->scheduler_id == ctx->scheduler_c_id ) {
0511 SetSelfScheduler( ctx->scheduler_a_id, priority );
0512 }
0513 break;
0514 }
0515
0516 case RtemsSchedulerReqAddProcessor_Post_Added_Nop: {
0517
0518
0519
0520
0521 T_eq_sz( ctx->scheduler_log.header.recorded, 0 );
0522
0523 CPU_ZERO( &set );
0524 CPU_SET( CPU_TO_ADD, &set );
0525 sc = rtems_task_set_affinity( RTEMS_SELF, sizeof( set ), &set );
0526 T_rsc( sc, RTEMS_INVALID_NUMBER );
0527 break;
0528 }
0529
0530 case RtemsSchedulerReqAddProcessor_Post_Added_NA:
0531 break;
0532 }
0533 }
0534
0535 static void RtemsSchedulerReqAddProcessor_Setup(
0536 RtemsSchedulerReqAddProcessor_Context *ctx
0537 )
0538 {
0539 rtems_status_code sc;
0540
0541 sc = rtems_scheduler_ident(
0542 TEST_SCHEDULER_A_NAME,
0543 &ctx->scheduler_a_id
0544 );
0545 T_rsc_success( sc );
0546
0547 #if defined(RTEMS_SMP)
0548 ctx->cpu = _Per_CPU_Get_by_index( CPU_TO_ADD );
0549
0550 sc = rtems_scheduler_ident( TEST_SCHEDULER_B_NAME, &ctx->scheduler_b_id );
0551 T_rsc_success( sc );
0552
0553 sc = rtems_scheduler_ident( TEST_SCHEDULER_C_NAME, &ctx->scheduler_c_id );
0554 T_rsc_success( sc );
0555 #else
0556 ctx->scheduler_b_id = INVALID_ID;
0557 ctx->scheduler_c_id = INVALID_ID;
0558 #endif
0559 }
0560
0561 static void RtemsSchedulerReqAddProcessor_Setup_Wrap( void *arg )
0562 {
0563 RtemsSchedulerReqAddProcessor_Context *ctx;
0564
0565 ctx = arg;
0566 ctx->Map.in_action_loop = false;
0567 RtemsSchedulerReqAddProcessor_Setup( ctx );
0568 }
0569
0570 static void RtemsSchedulerReqAddProcessor_Prepare(
0571 RtemsSchedulerReqAddProcessor_Context *ctx
0572 )
0573 {
0574 #if defined(RTEMS_SMP)
0575 ctx->add_cpu_to_scheduler_b = false;
0576 ctx->online = _Per_CPU_Is_processor_online( ctx->cpu );
0577 #endif
0578 }
0579
0580 static void RtemsSchedulerReqAddProcessor_Action(
0581 RtemsSchedulerReqAddProcessor_Context *ctx
0582 )
0583 {
0584 T_scheduler_log *log;
0585
0586 log = T_scheduler_record_2( &ctx->scheduler_log );
0587 T_null( log );
0588
0589 ctx->status = rtems_scheduler_add_processor( ctx->id, ctx->cpu_index );
0590
0591 log = T_scheduler_record( NULL );
0592 T_eq_ptr( &log->header, &ctx->scheduler_log.header );
0593 }
0594
0595 static void RtemsSchedulerReqAddProcessor_Cleanup(
0596 RtemsSchedulerReqAddProcessor_Context *ctx
0597 )
0598 {
0599 #if defined(RTEMS_SMP)
0600 rtems_status_code sc;
0601
0602 ctx->cpu->online = ctx->online;
0603
0604 if ( ctx->status == RTEMS_SUCCESSFUL ) {
0605 sc = rtems_scheduler_remove_processor( ctx->scheduler_id, CPU_TO_ADD );
0606 T_rsc_success( sc );
0607 }
0608
0609 if ( ctx->add_cpu_to_scheduler_b ) {
0610 sc = rtems_scheduler_add_processor( ctx->scheduler_b_id, CPU_TO_ADD );
0611 T_rsc_success( sc );
0612 }
0613 #endif
0614 }
0615
0616 static const RtemsSchedulerReqAddProcessor_Entry
0617 RtemsSchedulerReqAddProcessor_Entries[] = {
0618 { 0, 0, 0, 0, 1, RtemsSchedulerReqAddProcessor_Post_Status_InvId,
0619 RtemsSchedulerReqAddProcessor_Post_Added_Nop },
0620 { 0, 0, 0, 0, 1, RtemsSchedulerReqAddProcessor_Post_Status_NotConf,
0621 RtemsSchedulerReqAddProcessor_Post_Added_Nop },
0622 #if defined(RTEMS_SMP)
0623 { 0, 0, 0, 0, 0, RtemsSchedulerReqAddProcessor_Post_Status_InvId,
0624 RtemsSchedulerReqAddProcessor_Post_Added_Nop },
0625 #else
0626 { 1, 0, 0, 0, 0, RtemsSchedulerReqAddProcessor_Post_Status_NA,
0627 RtemsSchedulerReqAddProcessor_Post_Added_NA },
0628 #endif
0629 { 0, 0, 0, 0, 0, RtemsSchedulerReqAddProcessor_Post_Status_InvId,
0630 RtemsSchedulerReqAddProcessor_Post_Added_Nop },
0631 #if defined(RTEMS_SMP)
0632 { 0, 0, 0, 0, 0, RtemsSchedulerReqAddProcessor_Post_Status_Ok,
0633 RtemsSchedulerReqAddProcessor_Post_Added_Yes },
0634 #else
0635 { 1, 0, 0, 0, 0, RtemsSchedulerReqAddProcessor_Post_Status_NA,
0636 RtemsSchedulerReqAddProcessor_Post_Added_NA },
0637 #endif
0638 { 0, 0, 0, 0, 0, RtemsSchedulerReqAddProcessor_Post_Status_InUse,
0639 RtemsSchedulerReqAddProcessor_Post_Added_Nop },
0640 #if defined(RTEMS_SMP)
0641 { 0, 0, 0, 0, 0, RtemsSchedulerReqAddProcessor_Post_Status_IncStat,
0642 RtemsSchedulerReqAddProcessor_Post_Added_Nop },
0643 #else
0644 { 1, 0, 0, 0, 0, RtemsSchedulerReqAddProcessor_Post_Status_NA,
0645 RtemsSchedulerReqAddProcessor_Post_Added_NA },
0646 #endif
0647 #if defined(RTEMS_SMP)
0648 { 0, 0, 0, 0, 0, RtemsSchedulerReqAddProcessor_Post_Status_NotConf,
0649 RtemsSchedulerReqAddProcessor_Post_Added_Nop }
0650 #else
0651 { 1, 0, 0, 0, 0, RtemsSchedulerReqAddProcessor_Post_Status_NA,
0652 RtemsSchedulerReqAddProcessor_Post_Added_NA }
0653 #endif
0654 };
0655
0656 static const uint8_t
0657 RtemsSchedulerReqAddProcessor_Map[] = {
0658 2, 3, 2, 2, 0, 0, 0, 0, 4, 5, 6, 7, 1, 1, 1, 1, 2, 3, 2, 2, 0, 0, 0, 0, 4, 5,
0659 6, 7, 1, 1, 1, 1
0660 };
0661
0662 static size_t RtemsSchedulerReqAddProcessor_Scope(
0663 void *arg,
0664 char *buf,
0665 size_t n
0666 )
0667 {
0668 RtemsSchedulerReqAddProcessor_Context *ctx;
0669
0670 ctx = arg;
0671
0672 if ( ctx->Map.in_action_loop ) {
0673 return T_get_scope(
0674 RtemsSchedulerReqAddProcessor_PreDesc,
0675 buf,
0676 n,
0677 ctx->Map.pcs
0678 );
0679 }
0680
0681 return 0;
0682 }
0683
0684 static T_fixture RtemsSchedulerReqAddProcessor_Fixture = {
0685 .setup = RtemsSchedulerReqAddProcessor_Setup_Wrap,
0686 .stop = NULL,
0687 .teardown = NULL,
0688 .scope = RtemsSchedulerReqAddProcessor_Scope,
0689 .initial_context = &RtemsSchedulerReqAddProcessor_Instance
0690 };
0691
0692 static inline RtemsSchedulerReqAddProcessor_Entry
0693 RtemsSchedulerReqAddProcessor_PopEntry(
0694 RtemsSchedulerReqAddProcessor_Context *ctx
0695 )
0696 {
0697 size_t index;
0698
0699 index = ctx->Map.index;
0700 ctx->Map.index = index + 1;
0701 return RtemsSchedulerReqAddProcessor_Entries[
0702 RtemsSchedulerReqAddProcessor_Map[ index ]
0703 ];
0704 }
0705
0706 static void RtemsSchedulerReqAddProcessor_SetPreConditionStates(
0707 RtemsSchedulerReqAddProcessor_Context *ctx
0708 )
0709 {
0710 ctx->Map.pcs[ 0 ] = ctx->Map.pci[ 0 ];
0711 ctx->Map.pcs[ 1 ] = ctx->Map.pci[ 1 ];
0712 ctx->Map.pcs[ 2 ] = ctx->Map.pci[ 2 ];
0713
0714 if ( ctx->Map.entry.Pre_CPUState_NA ) {
0715 ctx->Map.pcs[ 3 ] = RtemsSchedulerReqAddProcessor_Pre_CPUState_NA;
0716 } else {
0717 ctx->Map.pcs[ 3 ] = ctx->Map.pci[ 3 ];
0718 }
0719 }
0720
0721 static void RtemsSchedulerReqAddProcessor_TestVariant(
0722 RtemsSchedulerReqAddProcessor_Context *ctx
0723 )
0724 {
0725 RtemsSchedulerReqAddProcessor_Pre_HasReady_Prepare( ctx, ctx->Map.pcs[ 0 ] );
0726 RtemsSchedulerReqAddProcessor_Pre_Id_Prepare( ctx, ctx->Map.pcs[ 1 ] );
0727 RtemsSchedulerReqAddProcessor_Pre_CPUIndex_Prepare( ctx, ctx->Map.pcs[ 2 ] );
0728 RtemsSchedulerReqAddProcessor_Pre_CPUState_Prepare( ctx, ctx->Map.pcs[ 3 ] );
0729 RtemsSchedulerReqAddProcessor_Action( ctx );
0730 RtemsSchedulerReqAddProcessor_Post_Status_Check(
0731 ctx,
0732 ctx->Map.entry.Post_Status
0733 );
0734 RtemsSchedulerReqAddProcessor_Post_Added_Check(
0735 ctx,
0736 ctx->Map.entry.Post_Added
0737 );
0738 }
0739
0740
0741
0742
0743 T_TEST_CASE_FIXTURE(
0744 RtemsSchedulerReqAddProcessor,
0745 &RtemsSchedulerReqAddProcessor_Fixture
0746 )
0747 {
0748 RtemsSchedulerReqAddProcessor_Context *ctx;
0749
0750 ctx = T_fixture_context();
0751 ctx->Map.in_action_loop = true;
0752 ctx->Map.index = 0;
0753
0754 for (
0755 ctx->Map.pci[ 0 ] = RtemsSchedulerReqAddProcessor_Pre_HasReady_Ready;
0756 ctx->Map.pci[ 0 ] < RtemsSchedulerReqAddProcessor_Pre_HasReady_NA;
0757 ++ctx->Map.pci[ 0 ]
0758 ) {
0759 for (
0760 ctx->Map.pci[ 1 ] = RtemsSchedulerReqAddProcessor_Pre_Id_Invalid;
0761 ctx->Map.pci[ 1 ] < RtemsSchedulerReqAddProcessor_Pre_Id_NA;
0762 ++ctx->Map.pci[ 1 ]
0763 ) {
0764 for (
0765 ctx->Map.pci[ 2 ] = RtemsSchedulerReqAddProcessor_Pre_CPUIndex_Valid;
0766 ctx->Map.pci[ 2 ] < RtemsSchedulerReqAddProcessor_Pre_CPUIndex_NA;
0767 ++ctx->Map.pci[ 2 ]
0768 ) {
0769 for (
0770 ctx->Map.pci[ 3 ] = RtemsSchedulerReqAddProcessor_Pre_CPUState_Idle;
0771 ctx->Map.pci[ 3 ] < RtemsSchedulerReqAddProcessor_Pre_CPUState_NA;
0772 ++ctx->Map.pci[ 3 ]
0773 ) {
0774 ctx->Map.entry = RtemsSchedulerReqAddProcessor_PopEntry( ctx );
0775
0776 if ( ctx->Map.entry.Skip ) {
0777 continue;
0778 }
0779
0780 RtemsSchedulerReqAddProcessor_SetPreConditionStates( ctx );
0781 RtemsSchedulerReqAddProcessor_Prepare( ctx );
0782 RtemsSchedulerReqAddProcessor_TestVariant( ctx );
0783 RtemsSchedulerReqAddProcessor_Cleanup( ctx );
0784 }
0785 }
0786 }
0787 }
0788 }
0789
0790