testsuites/validation/tc-intr.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RtemsIntrValIntr
0007  */
0008
0009 /*
0010  * Copyright (C) 2021 embedded brains GmbH & Co. KG
0011  *
0012  * Redistribution and use in source and binary forms, with or without
0013  * modification, are permitted provided that the following conditions
0014  * are met:
0015  * 1. Redistributions of source code must retain the above copyright
0016  *    notice, this list of conditions and the following disclaimer.
0017  * 2. Redistributions in binary form must reproduce the above copyright
0018  *    notice, this list of conditions and the following disclaimer in the
0019  *    documentation and/or other materials provided with the distribution.
0020  *
0021  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0022  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0023  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0024  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0025  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0026  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0027  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0028  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0029  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0030  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0031  * POSSIBILITY OF SUCH DAMAGE.
0032  */
0033
0034 /*
0035  * This file is part of the RTEMS quality process and was automatically
0036  * generated.  If you find something that needs to be fixed or
0037  * worded better please post a report or patch to an RTEMS mailing list
0038  * or raise a bug report:
0039  *
0040  * https://www.rtems.org/bugs.html
0041  *
0042  * For information on updating and regenerating please refer to the How-To
0043  * section in the Software Requirements Engineering chapter of the
0044  * RTEMS Software Engineering manual.  The manual is provided as a part of
0045  * a release.  For development sources please refer to the online
0046  * documentation at:
0047  *
0048  * https://docs.rtems.org
0049  */
0050
0051 #ifdef HAVE_CONFIG_H
0052 #include "config.h"
0053 #endif
0054
0055 #include <rtems.h>
0056 #include <rtems/irq-extension.h>
0057
0058 #include "tx-support.h"
0059
0060 #include <rtems/test.h>
0061
0062 /**
0063  * @defgroup RtemsIntrValIntr spec:/rtems/intr/val/intr
0064  *
0065  * @ingroup TestsuitesValidationNoClock0
0066  *
0067  * @brief Tests some @ref RTEMSAPIClassicIntr directives.
0068  *
0069  * This test case performs the following actions:
0070  *
0071  * - Validate rtems_interrupt_local_disable() and
0072  *   rtems_interrupt_local_enable().
0073  *
0074  *   - Check that maskable interrupts are enabled before the call to
0075  *     rtems_interrupt_local_disable() and disabled afterwards.
0076  *
0077  *   - Check that maskable interrupts are disabled before the call to
0078  *     rtems_interrupt_local_disable() and disabled afterwards.
0079  *
0080  *   - Check that the maskable interrupt status is restored by the call to
0081  *     rtems_interrupt_local_enable() according to the ``_isr_cookie``
0082  *     parameter.  In this case maskable interrupts are still disabled
0083  *     afterwards.
0084  *
0085  *   - Check that the maskable interrupt status is restored by the call to
0086  *     rtems_interrupt_local_enable() according to the ``_isr_cookie``
0087  *     parameter.  In this case maskable interrupts are enabled afterwards.
0088  *
0089  * - Validate the interrupt lock directives.
0090  *
0091  *   - Check that maskable interrupts are disabled before the call to
0092  *     rtems_interrupt_lock_interrupt_disable() and disabled afterwards.
0093  *
0094  *   - Check that the maskable interrupt status is not changed by the
0095  *     rtems_interrupt_lock_acquire_isr() call.
0096  *
0097  *   - Check that the maskable interrupt status is restored by the call to
0098  *     rtems_interrupt_lock_release() according to the ``_lock_context``
0099  *     parameter.
0100  *
0101  *   - Check that maskable interrupts are disabled before the call to
0102  *     rtems_interrupt_lock_acquire() and disabled afterwards.
0103  *
0104  *   - Check that the maskable interrupt status is restored by the call to
0105  *     rtems_interrupt_lock_release() according to the ``_lock_context``
0106  *     parameter.
0107  *
0108  *   - Check that the maskable interrupt status is not changed by the
0109  *     rtems_interrupt_lock_destroy() call.
0110  *
0111  * - Validate the interrupt entry initialization.
0112  *
0113  *   - Check that the entry is properly initialized by
0114  *     RTEMS_INTERRUPT_ENTRY_INITIALIZER().
0115  *
0116  *   - Call rtems_interrupt_entry_initialize().  Check that the entry is
0117  *     properly initialized by rtems_interrupt_entry_initialize().
0118  *
0119  * @{
0120  */
0121
0122 static void EntryRoutine( void *arg )
0123 {
0124   (void) arg;
0125 }
0126
0127 static void EntryRoutine2( void *arg )
0128 {
0129   (void) arg;
0130 }
0131
0132 /**
0133  * @brief Validate rtems_interrupt_local_disable() and
0134  *   rtems_interrupt_local_enable().
0135  */
0136 static void RtemsIntrValIntr_Action_0( void )
0137 {
0138   rtems_interrupt_level level;
0139   rtems_interrupt_level level_2;
0140
0141   /*
0142    * Check that maskable interrupts are enabled before the call to
0143    * rtems_interrupt_local_disable() and disabled afterwards.
0144    */
0145   T_true( AreInterruptsEnabled() );
0146   rtems_interrupt_local_disable( level );
0147   T_false( AreInterruptsEnabled() );
0148
0149   /*
0150    * Check that maskable interrupts are disabled before the call to
0151    * rtems_interrupt_local_disable() and disabled afterwards.
0152    */
0153   T_false( AreInterruptsEnabled() );
0154   rtems_interrupt_local_disable( level_2 );
0155   T_false( AreInterruptsEnabled() );
0156
0157   /*
0158    * Check that the maskable interrupt status is restored by the call to
0159    * rtems_interrupt_local_enable() according to the ``_isr_cookie`` parameter.
0160    * In this case maskable interrupts are still disabled afterwards.
0161    */
0162   T_false( AreInterruptsEnabled() );
0163   rtems_interrupt_local_enable( level_2 );
0164   T_false( AreInterruptsEnabled() );
0165
0166   /*
0167    * Check that the maskable interrupt status is restored by the call to
0168    * rtems_interrupt_local_enable() according to the ``_isr_cookie`` parameter.
0169    * In this case maskable interrupts are enabled afterwards.
0170    */
0171   T_false( AreInterruptsEnabled() );
0172   rtems_interrupt_local_enable( level );
0173   T_true( AreInterruptsEnabled() );
0174 }
0175
0176 /**
0177  * @brief Validate the interrupt lock directives.
0178  */
0179 static void RtemsIntrValIntr_Action_1( void )
0180 {
0181   RTEMS_INTERRUPT_LOCK_DEFINE( , lock, "name" );
0182   rtems_interrupt_lock_context lock_context;
0183
0184   /*
0185    * Check that maskable interrupts are disabled before the call to
0186    * rtems_interrupt_lock_interrupt_disable() and disabled afterwards.
0187    */
0188   T_true( AreInterruptsEnabled() );
0189   rtems_interrupt_lock_interrupt_disable( &lock_context );
0190   T_false( AreInterruptsEnabled() );
0191
0192   /*
0193    * Check that the maskable interrupt status is not changed by the
0194    * rtems_interrupt_lock_acquire_isr() call.
0195    */
0196   T_false( AreInterruptsEnabled() );
0197   rtems_interrupt_lock_acquire_isr( &lock, &lock_context );
0198   T_false( AreInterruptsEnabled() );
0199
0200   /*
0201    * Check that the maskable interrupt status is restored by the call to
0202    * rtems_interrupt_lock_release() according to the ``_lock_context``
0203    * parameter.
0204    */
0205   T_false( AreInterruptsEnabled() );
0206   rtems_interrupt_lock_release( &lock, &lock_context );
0207   T_true( AreInterruptsEnabled() );
0208
0209   /*
0210    * Check that maskable interrupts are disabled before the call to
0211    * rtems_interrupt_lock_acquire() and disabled afterwards.
0212    */
0213   T_true( AreInterruptsEnabled() );
0214   rtems_interrupt_lock_acquire( &lock, &lock_context );
0215   T_false( AreInterruptsEnabled() );
0216
0217   /*
0218    * Check that the maskable interrupt status is restored by the call to
0219    * rtems_interrupt_lock_release() according to the ``_lock_context``
0220    * parameter.
0221    */
0222   T_false( AreInterruptsEnabled() );
0223   rtems_interrupt_lock_release( &lock, &lock_context );
0224   T_true( AreInterruptsEnabled() );
0225
0226   /*
0227    * Check that the maskable interrupt status is not changed by the
0228    * rtems_interrupt_lock_destroy() call.
0229    */
0230   T_true( AreInterruptsEnabled() );
0231   rtems_interrupt_lock_destroy( &lock );
0232   T_true( AreInterruptsEnabled() );
0233 }
0234
0235 /**
0236  * @brief Validate the interrupt entry initialization.
0237  */
0238 static void RtemsIntrValIntr_Action_2( void )
0239 {
0240   int entry_arg;
0241   int entry_arg_2;
0242   const char entry_info[] = "1";
0243   const char entry_info_2[] = "1";
0244   rtems_interrupt_entry entry = RTEMS_INTERRUPT_ENTRY_INITIALIZER(
0245     EntryRoutine,
0246     &entry_arg,
0247     entry_info
0248   );
0249
0250   /*
0251    * Check that the entry is properly initialized by
0252    * RTEMS_INTERRUPT_ENTRY_INITIALIZER().
0253    */
0254   T_eq_ptr( entry.handler, EntryRoutine );
0255   T_eq_ptr( entry.arg, &entry_arg );
0256   T_eq_ptr( entry.next, NULL );
0257   T_eq_ptr( entry.info, entry_info );
0258
0259   /*
0260    * Call rtems_interrupt_entry_initialize().  Check that the entry is properly
0261    * initialized by rtems_interrupt_entry_initialize().
0262    */
0263   entry.next = &entry;
0264   rtems_interrupt_entry_initialize(
0265     &entry,
0266     EntryRoutine2,
0267     &entry_arg_2,
0268     entry_info_2
0269   );
0270   T_eq_ptr( entry.handler, EntryRoutine2 );
0271   T_eq_ptr( entry.arg, &entry_arg_2 );
0272   T_eq_ptr( entry.next, NULL );
0273   T_eq_ptr( entry.info, entry_info_2 );
0274 }
0275
0276 /**
0277  * @fn void T_case_body_RtemsIntrValIntr( void )
0278  */
0279 T_TEST_CASE( RtemsIntrValIntr )
0280 {
0281   RtemsIntrValIntr_Action_0();
0282   RtemsIntrValIntr_Action_1();
0283   RtemsIntrValIntr_Action_2();
0284 }
0285
0286 /** @} */