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File indexing completed on 2025-05-11 08:24:51
0001 /* SPDX-License-Identifier: BSD-2-Clause */ 0002 0003 /** 0004 * @file 0005 * 0006 * @ingroup BspSparcLeon3ValGr740 0007 */ 0008 0009 /* 0010 * Copyright (C) 2023 embedded brains GmbH & Co. KG 0011 * 0012 * Redistribution and use in source and binary forms, with or without 0013 * modification, are permitted provided that the following conditions 0014 * are met: 0015 * 1. Redistributions of source code must retain the above copyright 0016 * notice, this list of conditions and the following disclaimer. 0017 * 2. Redistributions in binary form must reproduce the above copyright 0018 * notice, this list of conditions and the following disclaimer in the 0019 * documentation and/or other materials provided with the distribution. 0020 * 0021 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 0022 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 0023 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 0024 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 0025 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 0026 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 0027 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 0028 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 0029 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 0030 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 0031 * POSSIBILITY OF SUCH DAMAGE. 0032 */ 0033 0034 /* 0035 * This file is part of the RTEMS quality process and was automatically 0036 * generated. If you find something that needs to be fixed or 0037 * worded better please post a report or patch to an RTEMS mailing list 0038 * or raise a bug report: 0039 * 0040 * https://www.rtems.org/bugs.html 0041 * 0042 * For information on updating and regenerating please refer to the How-To 0043 * section in the Software Requirements Engineering chapter of the 0044 * RTEMS Software Engineering manual. The manual is provided as a part of 0045 * a release. For development sources please refer to the online 0046 * documentation at: 0047 * 0048 * https://docs.rtems.org 0049 */ 0050 0051 #ifdef HAVE_CONFIG_H 0052 #include "config.h" 0053 #endif 0054 0055 #include <bsp.h> 0056 #include <grlib/io.h> 0057 #include <grlib/l2cache-regs.h> 0058 0059 #include "tx-support.h" 0060 0061 #include <rtems/test.h> 0062 0063 /** 0064 * @defgroup BspSparcLeon3ValGr740 spec:/bsp/sparc/leon3/val/gr740 0065 * 0066 * @ingroup TestsuitesBspsValidationBsp0 0067 * 0068 * @brief This test case collection provides validation test cases for the 0069 * ``sparc/gr740`` BSP. 0070 * 0071 * This test case performs the following actions: 0072 * 0073 * - Validate the required L2C bootloader settings. 0074 * 0075 * - Check that the bootloader did set the L2CACCC.128WF register field. 0076 * 0077 * - Check that the bootloader did clear the L2CACCC.DBPF register field. 0078 * 0079 * - Check that the bootloader did set the L2CACCC.SPLIT register field. 0080 * 0081 * - Check that the bootloader did clear the L2CERR.COMP register field. 0082 * 0083 * @{ 0084 */ 0085 0086 /** 0087 * @brief Validate the required L2C bootloader settings. 0088 */ 0089 static void BspSparcLeon3ValGr740_Action_0( void ) 0090 { 0091 l2cache *regs; 0092 uint32_t accc; 0093 uint32_t err; 0094 0095 regs = (l2cache *) LEON3_L2CACHE_BASE; 0096 accc = grlib_load_32( ®s->l2caccc ); 0097 err = grlib_load_32( ®s->l2cerr ); 0098 0099 /* 0100 * Check that the bootloader did set the L2CACCC.128WF register field. 0101 */ 0102 T_ne_u32( accc & L2CACHE_L2CACCC_128WF, 0 ); 0103 0104 /* 0105 * Check that the bootloader did clear the L2CACCC.DBPF register field. 0106 */ 0107 T_eq_u32( accc & L2CACHE_L2CACCC_DBPF, 0 ); 0108 0109 /* 0110 * Check that the bootloader did set the L2CACCC.SPLIT register field. 0111 */ 0112 T_ne_u32( accc & L2CACHE_L2CACCC_SPLIT, 0 ); 0113 0114 /* 0115 * Check that the bootloader did clear the L2CERR.COMP register field. 0116 */ 0117 T_eq_u32( err & L2CACHE_L2CERR_COMP, 0 ); 0118 } 0119 0120 /** 0121 * @fn void T_case_body_BspSparcLeon3ValGr740( void ) 0122 */ 0123 T_TEST_CASE( BspSparcLeon3ValGr740 ) 0124 { 0125 BspSparcLeon3ValGr740_Action_0(); 0126 } 0127 0128 /** @} */
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