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0036 #ifdef HAVE_CONFIG_H
0037 #include "config.h"
0038 #endif
0039
0040
0041
0042
0043 #include <rtems.h>
0044 #include <stdlib.h>
0045 #include <stdio.h>
0046 #include <assert.h>
0047 #include "system.h"
0048
0049 void test_cpu_and_case_1(size_t cpu1, size_t cpu2);
0050 void test_cpu_nand_case_1(size_t cpu1, size_t cpu2);
0051 void test_cpu_or_case_1(size_t cpu1, size_t cpu2);
0052 void test_cpu_xor_case_1(size_t cpu1, size_t cpu2);
0053 static void test_logic01_setup(size_t cpu1, size_t cpu2);
0054
0055
0056
0057
0058
0059 cpu_set_t set1;
0060 cpu_set_t set2;
0061 cpu_set_t set3;
0062
0063
0064 void test_cpu_and_case_1(size_t cpu1, size_t cpu2)
0065 {
0066 size_t i;
0067
0068
0069 DPRINT( "Exercise CPU_AND with bits %zd,%zd\n", cpu1, cpu2 );
0070 CPU_AND(&set3, &set1, &set2);
0071
0072
0073 for (i=0 ; i<CPU_SETSIZE ; i++) {
0074 if (i== cpu1)
0075 rtems_test_assert( CPU_ISSET(i, &set3) == 1 );
0076 else
0077 rtems_test_assert( CPU_ISSET(i, &set3) == 0 );
0078 }
0079
0080 }
0081
0082 void test_cpu_nand_case_1(size_t cpu1, size_t cpu2)
0083 {
0084 size_t i;
0085
0086
0087
0088
0089
0090 #ifdef __BIT_ANDNOT2
0091
0092 DPRINT( "Exercise CPU_ANDNOT with bits %zd,%zd\n", cpu1, cpu2 );
0093 CPU_ANDNOT(&set3, &set1, &set2);
0094 #else
0095
0096 DPRINT( "Exercise CPU_NAND with bits %zd,%zd\n", cpu1, cpu2 );
0097 CPU_NAND(&set3, &set1, &set2);
0098 #endif
0099
0100
0101 for (i=0 ; i<CPU_SETSIZE ; i++) {
0102 if (i== cpu2)
0103 rtems_test_assert( CPU_ISSET(i, &set3) == 1 );
0104 else
0105 rtems_test_assert( CPU_ISSET(i, &set3) == 0 );
0106 }
0107 }
0108
0109 void test_cpu_or_case_1(size_t cpu1, size_t cpu2)
0110 {
0111 size_t i;
0112
0113
0114 DPRINT( "Exercise CPU_OR with bits %zd,%zd\n", cpu1, cpu2 );
0115 CPU_OR(&set3, &set1, &set2);
0116
0117
0118 for (i=0 ; i<CPU_SETSIZE ; i++) {
0119 if ((i== cpu1) || (i==cpu2))
0120 rtems_test_assert( CPU_ISSET(i, &set3) == 1 );
0121 else
0122 rtems_test_assert( CPU_ISSET(i, &set3) == 0 );
0123 }
0124 }
0125
0126 void test_cpu_xor_case_1(size_t cpu1, size_t cpu2)
0127 {
0128 size_t i;
0129
0130
0131 DPRINT( "Exercise CPU_XOR with bits %zd,%zd\n", cpu1, cpu2 );
0132 CPU_XOR(&set3, &set1, &set2);
0133
0134
0135 for (i=0 ; i<CPU_SETSIZE ; i++) {
0136 if (i==cpu2)
0137 rtems_test_assert( CPU_ISSET(i, &set3) == 1 );
0138 else
0139 rtems_test_assert( CPU_ISSET(i, &set3) == 0 );
0140 }
0141 }
0142
0143 static void test_logic01_setup(size_t cpu1, size_t cpu2)
0144 {
0145
0146
0147
0148 CPU_ZERO(&set1);
0149 CPU_SET(cpu1, &set1);
0150 CPU_SET(cpu2, &set1);
0151 CPU_COPY(&set1, &set2);
0152 CPU_CLR(cpu2, &set2);
0153 }
0154
0155 void cpuset_logic_test()
0156 {
0157 size_t i,j;
0158
0159 for (i=0 ; i<CPU_SETSIZE ; i++) {
0160 for (j=0 ; j<CPU_SETSIZE ; j++) {
0161 if (i != j){
0162 test_logic01_setup(i,j);
0163 test_cpu_and_case_1(i, j);
0164 test_cpu_nand_case_1(i, j);
0165 test_cpu_or_case_1(i, j);
0166 test_cpu_xor_case_1(i, j);
0167 }
0168 }
0169 }
0170 }