smptests/smpcache01/init.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * Copyright (c) 2014 Aeroflex Gaisler AB.  All rights reserved.
0005  * Copyright (c) 2017 embedded brains GmbH & Co. KG
0006  *
0007  * Redistribution and use in source and binary forms, with or without
0008  * modification, are permitted provided that the following conditions
0009  * are met:
0010  * 1. Redistributions of source code must retain the above copyright
0011  *    notice, this list of conditions and the following disclaimer.
0012  * 2. Redistributions in binary form must reproduce the above copyright
0013  *    notice, this list of conditions and the following disclaimer in the
0014  *    documentation and/or other materials provided with the distribution.
0015  *
0016  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0017  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0018  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0019  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0020  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0021  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0022  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0023  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0024  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0025  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0026  * POSSIBILITY OF SUCH DAMAGE.
0027  */
0028
0029 #ifdef HAVE_CONFIG_H
0030 #include "config.h"
0031 #endif
0032
0033 #include <rtems/score/atomic.h>
0034 #include <rtems/score/smpbarrier.h>
0035 #include <rtems/score/smpimpl.h>
0036 #include <rtems.h>
0037 #include <limits.h>
0038 #include <setjmp.h>
0039 #include <string.h>
0040
0041 #include "tmacros.h"
0042
0043 const char rtems_test_name[] = "SMPCACHE 1";
0044
0045 #define CPU_COUNT 32
0046
0047 #define WORKER_PRIORITY 100
0048
0049 typedef struct {
0050   SMP_barrier_Control barrier;
0051   bool do_longjmp[CPU_COUNT];
0052   jmp_buf instruction_invalidate_return_context[CPU_COUNT];
0053 } test_context;
0054
0055 static test_context ctx = {
0056   .barrier = SMP_BARRIER_CONTROL_INITIALIZER,
0057 };
0058
0059 static void function_to_flush( void )
0060 {
0061   /* Does nothing. Used to give a pointer to instruction address space. */
0062 }
0063
0064 typedef void ( *test_case )( void );
0065
0066 static void test_cache_invalidate_entire_instruction( void )
0067 {
0068   rtems_cache_invalidate_entire_instruction();
0069 }
0070
0071 static void test_cache_invalidate_multiple_instruction_lines( void )
0072 {
0073   uint32_t self = rtems_scheduler_get_processor();
0074
0075   ctx.do_longjmp[self] = true;
0076
0077   if (setjmp(ctx.instruction_invalidate_return_context[self]) == 0) {
0078     rtems_cache_invalidate_multiple_instruction_lines( &function_to_flush,
0079         4 /* arbitrary size */ );
0080   }
0081
0082   ctx.do_longjmp[self] = false;
0083 }
0084
0085 static void barrier( SMP_barrier_State *bs )
0086 {
0087   _SMP_barrier_Wait(
0088     &ctx.barrier,
0089     bs,
0090     rtems_scheduler_get_processor_maximum()
0091   );
0092 }
0093
0094 static test_case test_cases[] = {
0095   test_cache_invalidate_entire_instruction,
0096   test_cache_invalidate_multiple_instruction_lines
0097 };
0098
0099 static void call_tests( SMP_barrier_State *bs )
0100 {
0101   size_t i;
0102
0103   for (i = 0; i < RTEMS_ARRAY_SIZE( test_cases ); ++i) {
0104     barrier( bs );
0105     ( *test_cases[ i ] )();
0106     barrier( bs );
0107   }
0108 }
0109
0110 static void call_tests_isr_disabled( SMP_barrier_State *bs )
0111 {
0112   size_t i;
0113
0114   for (i = 0; i < RTEMS_ARRAY_SIZE( test_cases ); ++i) {
0115     ISR_Level isr_level;
0116
0117     _ISR_Local_disable( isr_level );
0118     barrier( bs );
0119     ( *test_cases[ i ] )();
0120     _ISR_Local_enable( isr_level );
0121     barrier( bs );
0122   }
0123 }
0124
0125 static void call_tests_with_thread_dispatch_disabled( SMP_barrier_State *bs )
0126 {
0127   size_t i;
0128
0129   for (i = 0; i < RTEMS_ARRAY_SIZE( test_cases ); ++i) {
0130     Per_CPU_Control *cpu_self;
0131
0132     cpu_self = _Thread_Dispatch_disable();
0133     barrier( bs );
0134     ( *test_cases[ i ] )();
0135     barrier( bs );
0136     _Thread_Dispatch_enable( cpu_self );
0137   }
0138 }
0139
0140 static void cmlog(  const char* str )
0141 {
0142   if ( rtems_scheduler_get_processor() == 0 )
0143     printf( "%s", str );
0144 }
0145
0146 static void all_tests( void )
0147 {
0148   SMP_barrier_State bs = SMP_BARRIER_STATE_INITIALIZER;
0149
0150   /* Call test cases */
0151   cmlog( "Calling test cases. " );
0152   call_tests( &bs );
0153   cmlog( "Done!\n");
0154
0155   /* Call test cases with ISR disabled */
0156   cmlog( "Calling test cases with ISR disabled. " );
0157   call_tests_isr_disabled( &bs );
0158   cmlog( "Done!\n" );
0159
0160   /* Call test cases with thread dispatch disabled */
0161   cmlog( "Calling test cases with thread_dispatch_disabled. ");
0162   call_tests_with_thread_dispatch_disabled( &bs );
0163   cmlog( "Done!\n");
0164
0165   /* Done. Free up memory. */
0166   _SMP_barrier_Wait(
0167     &ctx.barrier,
0168     &bs,
0169     rtems_scheduler_get_processor_maximum()
0170   );
0171 }
0172
0173 static void worker_task(rtems_task_argument arg)
0174 {
0175   rtems_status_code sc;
0176
0177   all_tests();
0178
0179   sc = rtems_task_suspend(RTEMS_SELF);
0180   rtems_test_assert(sc == RTEMS_SUCCESSFUL);
0181 }
0182
0183 static void test_smp_cache_manager( void )
0184 {
0185   rtems_status_code sc;
0186   size_t worker_index;
0187   uint32_t cpu_count = rtems_scheduler_get_processor_maximum();
0188
0189   for (worker_index = 1; worker_index < cpu_count; ++worker_index) {
0190     rtems_id worker_id;
0191
0192     sc = rtems_task_create(
0193       rtems_build_name('W', 'R', 'K', '0'+worker_index),
0194       WORKER_PRIORITY,
0195       RTEMS_MINIMUM_STACK_SIZE,
0196       RTEMS_DEFAULT_MODES,
0197       RTEMS_DEFAULT_ATTRIBUTES,
0198       &worker_id
0199     );
0200     rtems_test_assert( sc == RTEMS_SUCCESSFUL );
0201
0202     sc = rtems_task_start( worker_id, worker_task, 0 );
0203     rtems_test_assert( sc == RTEMS_SUCCESSFUL );
0204   }
0205
0206   all_tests();
0207 }
0208
0209
0210 static void Init(rtems_task_argument arg)
0211 {
0212   TEST_BEGIN();
0213
0214   test_smp_cache_manager();
0215
0216   TEST_END();
0217   rtems_test_exit(0);
0218 }
0219
0220 static void fatal_extension(
0221   rtems_fatal_source source,
0222   bool always_set_to_false,
0223   rtems_fatal_code error
0224 )
0225 {
0226   uint32_t self = rtems_scheduler_get_processor();
0227
0228   if (source == RTEMS_FATAL_SOURCE_EXCEPTION && ctx.do_longjmp[self]) {
0229     _ISR_Set_level(0);
0230     longjmp(ctx.instruction_invalidate_return_context[self], 1);
0231   }
0232 }
0233
0234 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
0235 #define CONFIGURE_APPLICATION_NEEDS_SIMPLE_CONSOLE_DRIVER
0236
0237 #define CONFIGURE_MAXIMUM_PROCESSORS CPU_COUNT
0238
0239 #define CONFIGURE_MAXIMUM_TASKS CPU_COUNT
0240
0241 #define CONFIGURE_MAXIMUM_TIMERS 1
0242
0243 #define CONFIGURE_INITIAL_EXTENSIONS \
0244   { .fatal = fatal_extension }, \
0245   RTEMS_TEST_INITIAL_EXTENSION
0246
0247 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
0248
0249 #define CONFIGURE_INIT
0250
0251 #include <rtems/confdefs.h>