libtests/i2c01/init.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * Copyright (c) 2014 embedded brains GmbH & Co. KG
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027
0028 #ifdef HAVE_CONFIG_H
0029 #include "config.h"
0030 #endif
0031
0032 #include <dev/i2c/i2c.h>
0033 #include <dev/i2c/eeprom.h>
0034 #include <dev/i2c/gpio-nxp-pca9535.h>
0035 #include <dev/i2c/switch-nxp-pca9548a.h>
0036
0037 #include <sys/ioctl.h>
0038 #include <sys/stat.h>
0039 #include <errno.h>
0040 #include <fcntl.h>
0041 #include <stdlib.h>
0042 #include <string.h>
0043 #include <unistd.h>
0044
0045 #include <rtems/libcsupport.h>
0046
0047 #include "tmacros.h"
0048
0049 const char rtems_test_name[] = "I2C 1";
0050
0051 #define SPARE_ADDRESS_BITS 3
0052
0053 #define DEVICE_SIMPLE_READ_WRITE (0UL << SPARE_ADDRESS_BITS)
0054
0055 #define DEVICE_EEPROM (1UL << SPARE_ADDRESS_BITS)
0056
0057 #define DEVICE_GPIO_NXP_PCA9535 (2UL << SPARE_ADDRESS_BITS)
0058
0059 #define DEVICE_SWITCH_NXP_PCA9548A (3UL << SPARE_ADDRESS_BITS)
0060
0061 #define EEPROM_SIZE 512
0062
0063 typedef struct test_device test_device;
0064
0065 struct test_device {
0066   int (*transfer)(
0067     i2c_bus *bus,
0068     i2c_msg *msgs,
0069     uint32_t msg_count,
0070     test_device *dev
0071   );
0072 };
0073
0074 typedef struct {
0075   test_device base;
0076   char buf[3];
0077 } test_device_simple_read_write;
0078
0079 typedef struct {
0080   test_device base;
0081   unsigned current_reg;
0082   uint8_t regs[8];
0083 } test_device_gpio_nxp_pca9535;
0084
0085 typedef struct {
0086   test_device base;
0087   bool eio;
0088   unsigned current_address;
0089   uint8_t data[EEPROM_SIZE];
0090 } test_device_eeprom;
0091
0092 typedef struct {
0093   test_device base;
0094   uint8_t control;
0095 } test_device_switch_nxp_pca9548a;
0096
0097 typedef struct {
0098   i2c_bus base;
0099   unsigned long clock;
0100   test_device *devices[4];
0101   test_device_simple_read_write simple_read_write;
0102   test_device_gpio_nxp_pca9535 gpio_nxp_pca9535;
0103   test_device_eeprom eeprom;
0104   test_device_switch_nxp_pca9548a switch_nxp_pca9548a;
0105 } test_bus;
0106
0107 static const char bus_path[] = "/dev/i2c-0";
0108
0109 static const char gpio_nxp_pca9535_path[] = "/dev/i2c-0.gpio-nxp-pc9535-0";
0110
0111 static const char eeprom_path[] = "/dev/i2c-0.eeprom-0";
0112
0113 static const char switch_nxp_pca9548a_path[] =
0114   "/dev/i2c-0.switch-nxp-pca9548a-0";
0115
0116 static void cyclic_inc(unsigned *val, unsigned cycle)
0117 {
0118   unsigned v = *val;
0119   unsigned m = cycle - 1U;
0120
0121   *val = (v & ~m) + ((v + 1U) & m);
0122 }
0123
0124 static int test_simple_read_write_transfer(
0125   i2c_bus *bus,
0126   i2c_msg *msgs,
0127   uint32_t msg_count,
0128   test_device *base
0129 )
0130 {
0131   test_device_simple_read_write *dev = (test_device_simple_read_write *) base;
0132
0133   if (msg_count == 1 && msgs[0].len == sizeof(dev->buf)) {
0134     if ((msgs[0].flags & I2C_M_RD) != 0) {
0135       memcpy(msgs[0].buf, &dev->buf[0], sizeof(dev->buf));
0136     } else {
0137       memcpy(&dev->buf[0], msgs[0].buf, sizeof(dev->buf));
0138     }
0139
0140     return 0;
0141   } else {
0142     return -EIO;
0143   }
0144 }
0145
0146 static int test_gpio_nxp_pca9535_transfer(
0147   i2c_bus *bus,
0148   i2c_msg *msgs,
0149   uint32_t msg_count,
0150   test_device *base
0151 )
0152 {
0153   test_device_gpio_nxp_pca9535 *dev = (test_device_gpio_nxp_pca9535 *) base;
0154   i2c_msg *first = &msgs[0];
0155   i2c_msg *second = &msgs[1];
0156   int i;
0157
0158   /* Get command byte */
0159   if (
0160     msg_count < 1
0161       || (first->flags & I2C_M_RD) != 0
0162       || first->len < 1
0163   ) {
0164     return -EIO;
0165   }
0166
0167   dev->current_reg = first->buf[0];
0168
0169   if (first->len > 1) {
0170     /* Write */
0171
0172     if (msg_count != 1) {
0173       return -EIO;
0174     }
0175
0176     for (i = 1; i < first->len; ++i) {
0177       dev->regs[dev->current_reg] = first->buf[i];
0178
0179       /* Output is input */
0180       if (dev->current_reg == 2) {
0181         dev->regs[0] = first->buf[i];
0182       } else if (dev->current_reg == 3) {
0183         dev->regs[1] = first->buf[i];
0184       }
0185
0186       cyclic_inc(&dev->current_reg, 2);
0187     }
0188   } else {
0189     /* Read */
0190
0191     if (msg_count != 2) {
0192       return -EIO;
0193     }
0194
0195     for (i = 0; i < second->len; ++i) {
0196       second->buf[i] = dev->regs[dev->current_reg];
0197       cyclic_inc(&dev->current_reg, 2);
0198     }
0199   }
0200
0201   return 0;
0202 }
0203
0204 static int test_eeprom_transfer(
0205   i2c_bus *bus,
0206   i2c_msg *msgs,
0207   uint32_t msg_count,
0208   test_device *base
0209 )
0210 {
0211   test_device_eeprom *dev = (test_device_eeprom *) base;
0212   i2c_msg *msg = &msgs[0];
0213   uint32_t i;
0214
0215   if (dev->eio) {
0216     return -EIO;
0217   }
0218
0219   if (msg_count > 0 && (msg->flags & I2C_M_RD) == 0) {
0220     if (msg->len < 1) {
0221       return -EIO;
0222     }
0223
0224     dev->current_address = msg->buf[0] | ((msg->addr & 0x1) << 8);
0225     --msg->len;
0226     ++msg->buf;
0227   }
0228
0229   for (i = 0; i < msg_count; ++i) {
0230     int j;
0231
0232     msg = &msgs[i];
0233
0234     if ((msg->flags & I2C_M_RD) != 0) {
0235       for (j = 0; j < msg->len; ++j) {
0236         msg->buf[j] = dev->data[dev->current_address];
0237         cyclic_inc(&dev->current_address, sizeof(dev->data));
0238       }
0239     } else {
0240       for (j = 0; j < msg->len; ++j) {
0241         dev->data[dev->current_address] = msg->buf[j];
0242         cyclic_inc(&dev->current_address, 8);
0243       }
0244     }
0245   }
0246
0247   return 0;
0248 }
0249
0250 static int test_switch_nxp_pca9548a_transfer(
0251   i2c_bus *bus,
0252   i2c_msg *msgs,
0253   uint32_t msg_count,
0254   test_device *base
0255 )
0256 {
0257   test_device_switch_nxp_pca9548a *dev = (test_device_switch_nxp_pca9548a *) base;
0258   uint32_t i;
0259
0260   for (i = 0; i < msg_count; ++i) {
0261     i2c_msg *msg = &msgs[i];
0262     int j;
0263
0264     if ((msg->flags & I2C_M_RD) != 0) {
0265       for (j = 0; j < msg->len; ++j) {
0266         msg->buf[j] = dev->control;
0267       }
0268     } else {
0269       for (j = 0; j < msg->len; ++j) {
0270         dev->control = msg->buf[j];
0271       }
0272     }
0273   }
0274
0275   return 0;
0276 }
0277
0278 static int test_transfer(i2c_bus *base, i2c_msg *msgs, uint32_t msg_count)
0279 {
0280   test_bus *bus = (test_bus *) base;
0281   uint16_t addr;
0282   test_device *dev;
0283
0284   addr = msgs[0].addr >> SPARE_ADDRESS_BITS;
0285   if (addr >= RTEMS_ARRAY_SIZE(bus->devices)) {
0286     return -EIO;
0287   }
0288
0289   dev = bus->devices[addr];
0290
0291   return (*dev->transfer)(&bus->base, msgs, msg_count, dev);
0292 }
0293
0294 static int test_set_clock(i2c_bus *base, unsigned long clock)
0295 {
0296   test_bus *bus = (test_bus *) base;
0297
0298   bus->clock = clock;
0299
0300   return 0;
0301 }
0302
0303 static void test_destroy(i2c_bus *base)
0304 {
0305   i2c_bus_destroy_and_free(base);
0306 }
0307
0308 static void test_simple_read_write(test_bus *bus, int fd)
0309 {
0310   static const char zero[] = { 0, 0, 0 };
0311   static const char abc[] = { 'a', 'b', 'c' };
0312
0313   int rv;
0314   char buf[3];
0315   ssize_t n;
0316
0317   rv = ioctl(fd, I2C_SLAVE, DEVICE_SIMPLE_READ_WRITE);
0318   rtems_test_assert(rv == 0);
0319
0320   errno = 0;
0321   rv = ioctl(fd, 0xb00b);
0322   rtems_test_assert(rv == -1);
0323   rtems_test_assert(errno == ENOTTY);
0324
0325   errno = 0;
0326   n = write(fd, &buf[0], 1000);
0327   rtems_test_assert(n == -1);
0328   rtems_test_assert(errno == EIO);
0329
0330   errno = 0;
0331   n = read(fd, &buf[0], 1000);
0332   rtems_test_assert(n == -1);
0333   rtems_test_assert(errno == EIO);
0334
0335   rtems_test_assert(
0336     memcmp(&bus->simple_read_write.buf[0], &zero[0], sizeof(buf)) == 0
0337   );
0338
0339   n = write(fd, &abc[0], sizeof(buf));
0340   rtems_test_assert(n == (ssize_t) sizeof(buf));
0341
0342   rtems_test_assert(
0343     memcmp(&bus->simple_read_write.buf[0], &abc[0], sizeof(buf)) == 0
0344   );
0345
0346   n = read(fd, &buf[0], sizeof(buf));
0347   rtems_test_assert(n == (ssize_t) sizeof(buf));
0348
0349   rtems_test_assert(memcmp(&buf[0], &abc[0], sizeof(buf)) == 0);
0350 }
0351
0352 typedef struct {
0353   rtems_id caller;
0354   int fd;
0355 } bus_obtainer_ctx;
0356
0357 static void bus_obtainer_task(rtems_task_argument arg)
0358 {
0359   rtems_event_set e = 0;
0360   bus_obtainer_ctx *c = (bus_obtainer_ctx *) arg;
0361   int rv;
0362   rtems_status_code sc;
0363
0364   rv = ioctl(c->fd, I2C_BUS_OBTAIN);
0365   rtems_test_assert(rv == 0);
0366
0367   sc = rtems_event_send(c->caller, RTEMS_EVENT_1);
0368   rtems_test_assert(sc == RTEMS_SUCCESSFUL);
0369   sc = rtems_event_receive(
0370     RTEMS_EVENT_1,
0371     RTEMS_EVENT_ANY | RTEMS_WAIT,
0372     100,
0373     &e
0374   );
0375   rtems_test_assert(sc == RTEMS_SUCCESSFUL);
0376
0377   rv = ioctl(c->fd, I2C_BUS_RELEASE);
0378   rtems_test_assert(rv == 0);
0379
0380   sc = rtems_event_send(c->caller, RTEMS_EVENT_1);
0381   rtems_test_assert(sc == RTEMS_SUCCESSFUL);
0382 }
0383
0384 static void test_nonblock_read_write(test_bus *bus, int fd)
0385 {
0386   int flags;
0387   int rv;
0388   char buf[3];
0389   ssize_t n;
0390   i2c_msg msgs[] = {{
0391     .addr = 1,
0392     .flags = I2C_M_STOP,
0393     .len = sizeof(buf),
0394     .buf = (uint8_t *) buf,
0395   }};
0396   struct i2c_rdwr_ioctl_data payload = {
0397     .msgs = msgs,
0398     .nmsgs = sizeof(msgs)/sizeof(msgs[0]),
0399   };
0400   rtems_id id;
0401   rtems_event_set e = 0;
0402   bus_obtainer_ctx ctx = {
0403     .caller = rtems_task_self(),
0404     .fd = fd,
0405   };
0406   rtems_status_code sc;
0407
0408   flags = fcntl(fd, F_GETFL, 0);
0409   rtems_test_assert(flags > 0);
0410
0411   rv = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
0412   rtems_test_assert(rv != -1);
0413
0414   sc = rtems_task_create(
0415     rtems_build_name('O', 'B', 'T', 'A'),
0416     2,
0417     RTEMS_MINIMUM_STACK_SIZE,
0418     RTEMS_DEFAULT_MODES,
0419     RTEMS_DEFAULT_ATTRIBUTES,
0420     &id
0421   );
0422   rtems_test_assert(sc == RTEMS_SUCCESSFUL);
0423
0424   sc = rtems_task_start(
0425     id,
0426     bus_obtainer_task,
0427     (rtems_task_argument) &ctx
0428   );
0429   rtems_test_assert(sc == RTEMS_SUCCESSFUL);
0430
0431   sc = rtems_event_receive(
0432     RTEMS_EVENT_1,
0433     RTEMS_EVENT_ANY | RTEMS_WAIT,
0434     100,
0435     &e
0436   );
0437   rtems_test_assert(sc == RTEMS_SUCCESSFUL);
0438
0439   errno = 0;
0440   n = read(fd, &buf[0], sizeof(buf));
0441   rtems_test_assert(n == -1);
0442   rtems_test_assert(errno == EAGAIN);
0443
0444   errno = 0;
0445   n = write(fd, &buf[0], sizeof(buf));
0446   rtems_test_assert(n == -1);
0447   rtems_test_assert(errno == EAGAIN);
0448
0449   errno = 0;
0450   rv = ioctl(fd, I2C_RDWR, &payload);
0451   rtems_test_assert(rv == -1);
0452   rtems_test_assert(errno == EAGAIN);
0453
0454   sc = rtems_event_send(id, RTEMS_EVENT_1);
0455   rtems_test_assert(sc == RTEMS_SUCCESSFUL);
0456   sc = rtems_event_receive(
0457     RTEMS_EVENT_1,
0458     RTEMS_EVENT_ANY | RTEMS_WAIT,
0459     100,
0460     &e
0461   );
0462   rtems_test_assert(sc == RTEMS_SUCCESSFUL);
0463   sc = rtems_task_delete(id);
0464   rtems_test_assert(sc == RTEMS_SUCCESSFUL);
0465
0466   rv = fcntl(fd, F_SETFL, flags);
0467   rtems_test_assert(rv != -1);
0468 }
0469
0470 static void test_gpio_nxp_pca9535(void)
0471 {
0472   int rv;
0473   int fd;
0474   uint16_t val;
0475
0476   rv = i2c_dev_register_gpio_nxp_pca9535(
0477     &bus_path[0],
0478     &gpio_nxp_pca9535_path[0],
0479     DEVICE_GPIO_NXP_PCA9535
0480   );
0481   rtems_test_assert(rv == 0);
0482
0483   fd = open(&gpio_nxp_pca9535_path[0], O_RDWR);
0484   rtems_test_assert(fd >= 0);
0485
0486   rv = gpio_nxp_pca9535_get_input(fd, &val);
0487   rtems_test_assert(rv == 0);
0488   rtems_test_assert(val == 0);
0489
0490   rv = gpio_nxp_pca9535_get_output(fd, &val);
0491   rtems_test_assert(rv == 0);
0492   rtems_test_assert(val == 0);
0493
0494   rv = gpio_nxp_pca9535_set_output(fd, 0xa5ef);
0495   rtems_test_assert(rv == 0);
0496
0497   rv = gpio_nxp_pca9535_get_input(fd, &val);
0498   rtems_test_assert(rv == 0);
0499   rtems_test_assert(val == 0xa5ef);
0500
0501   rv = gpio_nxp_pca9535_get_output(fd, &val);
0502   rtems_test_assert(rv == 0);
0503   rtems_test_assert(val == 0xa5ef);
0504
0505   rv = gpio_nxp_pca9535_clear_and_set_output(fd, 0x0ff0, 0x0170);
0506   rtems_test_assert(rv == 0);
0507
0508   rv = gpio_nxp_pca9535_get_polarity_inversion(fd, &val);
0509   rtems_test_assert(rv == 0);
0510   rtems_test_assert(val == 0);
0511
0512   rv = gpio_nxp_pca9535_set_polarity_inversion(fd, 0x5afe);
0513   rtems_test_assert(rv == 0);
0514
0515   rv = gpio_nxp_pca9535_get_config(fd, &val);
0516   rtems_test_assert(rv == 0);
0517   rtems_test_assert(val == 0);
0518
0519   rv = gpio_nxp_pca9535_set_config(fd, 0x2bcd);
0520   rtems_test_assert(rv == 0);
0521
0522   rv = gpio_nxp_pca9535_get_input(fd, &val);
0523   rtems_test_assert(rv == 0);
0524   rtems_test_assert(val == 0xa17f);
0525
0526   rv = gpio_nxp_pca9535_get_output(fd, &val);
0527   rtems_test_assert(rv == 0);
0528   rtems_test_assert(val == 0xa17f);
0529
0530   rv = gpio_nxp_pca9535_get_polarity_inversion(fd, &val);
0531   rtems_test_assert(rv == 0);
0532   rtems_test_assert(val == 0x5afe);
0533
0534   rv = gpio_nxp_pca9535_get_config(fd, &val);
0535   rtems_test_assert(rv == 0);
0536   rtems_test_assert(val == 0x2bcd);
0537
0538   rv = close(fd);
0539   rtems_test_assert(rv == 0);
0540
0541   rv = unlink(&gpio_nxp_pca9535_path[0]);
0542   rtems_test_assert(rv == 0);
0543 }
0544
0545 static void test_eeprom(test_bus *bus)
0546 {
0547   int rv;
0548   int fd_in;
0549   int fd_out;
0550   struct stat st;
0551   uint8_t in[EEPROM_SIZE];
0552   uint8_t out[EEPROM_SIZE];
0553   ssize_t n;
0554   off_t off;
0555   size_t i;
0556
0557   rv = i2c_dev_register_eeprom(
0558     &bus_path[0],
0559     &eeprom_path[0],
0560     DEVICE_EEPROM,
0561     1,
0562     8,
0563     sizeof(out),
0564     0
0565   );
0566   rtems_test_assert(rv == 0);
0567
0568   fd_in = open(&eeprom_path[0], O_RDWR);
0569   rtems_test_assert(fd_in >= 0);
0570
0571   fd_out = open(&eeprom_path[0], O_RDWR);
0572   rtems_test_assert(fd_out >= 0);
0573
0574   rv = fstat(fd_in, &st);
0575   rtems_test_assert(rv == 0);
0576   rtems_test_assert(st.st_blksize == 8);
0577   rtems_test_assert(st.st_size == sizeof(out));
0578
0579   memset(&out[0], 0, sizeof(out));
0580
0581   bus->eeprom.eio = true;
0582
0583   errno = 0;
0584   n = read(fd_in, &in[0], 1);
0585   rtems_test_assert(n == -1);
0586   rtems_test_assert(errno == EIO);
0587
0588   errno = 0;
0589   n = write(fd_out, &out[0], 1);
0590   rtems_test_assert(n == -1);
0591   rtems_test_assert(errno == EIO);
0592
0593   bus->eeprom.eio = false;
0594
0595   n = read(fd_in, &in[0], sizeof(in) + 1);
0596   rtems_test_assert(n == (ssize_t) sizeof(in));
0597
0598   rtems_test_assert(memcmp(&in[0], &out[0], sizeof(in)) == 0);
0599
0600   off = lseek(fd_in, 0, SEEK_CUR);
0601   rtems_test_assert(off == sizeof(out));
0602
0603   for (i = 0; i < sizeof(out); ++i) {
0604     off = lseek(fd_out, 0, SEEK_CUR);
0605     rtems_test_assert(off == i);
0606
0607     out[i] = (uint8_t) i;
0608
0609     n = write(fd_out, &out[i], sizeof(out[i]));
0610     rtems_test_assert(n == (ssize_t) sizeof(out[i]));
0611
0612     off = lseek(fd_in, 0, SEEK_SET);
0613     rtems_test_assert(off == 0);
0614
0615     n = read(fd_in, &in[0], sizeof(in));
0616     rtems_test_assert(n == (ssize_t) sizeof(in));
0617
0618     rtems_test_assert(memcmp(&in[0], &out[0], sizeof(in)) == 0);
0619   }
0620
0621   rv = close(fd_in);
0622   rtems_test_assert(rv == 0);
0623
0624   rv = close(fd_out);
0625   rtems_test_assert(rv == 0);
0626
0627   rv = unlink(&eeprom_path[0]);
0628   rtems_test_assert(rv == 0);
0629 }
0630
0631 static void test_switch_nxp_pca9548a(void)
0632 {
0633   int rv;
0634   int fd;
0635   uint8_t val;
0636
0637   rv = i2c_dev_register_switch_nxp_pca9548a(
0638     &bus_path[0],
0639     &switch_nxp_pca9548a_path[0],
0640     DEVICE_SWITCH_NXP_PCA9548A
0641   );
0642   rtems_test_assert(rv == 0);
0643
0644   fd = open(&switch_nxp_pca9548a_path[0], O_RDWR);
0645   rtems_test_assert(fd >= 0);
0646
0647   rv = switch_nxp_pca9548a_get_control(fd, &val);
0648   rtems_test_assert(rv == 0);
0649   rtems_test_assert(val == 0);
0650
0651   rv = switch_nxp_pca9548a_set_control(fd, 0xa5);
0652   rtems_test_assert(rv == 0);
0653
0654   rv = switch_nxp_pca9548a_get_control(fd, &val);
0655   rtems_test_assert(rv == 0);
0656   rtems_test_assert(val == 0xa5);
0657
0658   rv = close(fd);
0659   rtems_test_assert(rv == 0);
0660
0661   rv = unlink(&switch_nxp_pca9548a_path[0]);
0662   rtems_test_assert(rv == 0);
0663 }
0664
0665 static void test(void)
0666 {
0667   rtems_resource_snapshot snapshot;
0668   test_bus *bus;
0669   int rv;
0670   int fd;
0671
0672   rtems_resource_snapshot_take(&snapshot);
0673
0674   bus = (test_bus *) i2c_bus_alloc_and_init(sizeof(*bus));
0675   rtems_test_assert(bus != NULL);
0676
0677   bus->base.transfer = test_transfer;
0678   bus->base.set_clock = test_set_clock;
0679   bus->base.destroy = test_destroy;
0680   bus->base.functionality = I2C_FUNC_I2C | I2C_FUNC_PROTOCOL_MANGLING
0681     | I2C_FUNC_NOSTART;
0682
0683   bus->simple_read_write.base.transfer = test_simple_read_write_transfer;
0684   bus->devices[0] = &bus->simple_read_write.base;
0685
0686   bus->eeprom.base.transfer = test_eeprom_transfer;
0687   bus->devices[1] = &bus->eeprom.base;
0688
0689   bus->gpio_nxp_pca9535.base.transfer = test_gpio_nxp_pca9535_transfer;
0690   bus->devices[2] = &bus->gpio_nxp_pca9535.base;
0691
0692   bus->switch_nxp_pca9548a.base.transfer = test_switch_nxp_pca9548a_transfer;
0693   bus->devices[3] = &bus->switch_nxp_pca9548a.base;
0694
0695   rv = i2c_bus_register(&bus->base, &bus_path[0]);
0696   rtems_test_assert(rv == 0);
0697
0698   fd = open(&bus_path[0], O_RDWR);
0699   rtems_test_assert(fd >= 0);
0700
0701   rtems_test_assert(bus->clock == 0);
0702   rv = ioctl(fd, I2C_BUS_SET_CLOCK, 0xdeadbeefUL);
0703   rtems_test_assert(rv == 0);
0704   rtems_test_assert(bus->clock == 0xdeadbeef);
0705
0706   rv = ioctl(fd, I2C_BUS_OBTAIN);
0707   rtems_test_assert(rv == 0);
0708
0709   rv = ioctl(fd, I2C_BUS_RELEASE);
0710   rtems_test_assert(rv == 0);
0711
0712   rtems_test_assert(!bus->base.ten_bit_address);
0713
0714   rv = ioctl(fd, I2C_TENBIT, 1UL);
0715   rtems_test_assert(rv == 0);
0716   rtems_test_assert(bus->base.ten_bit_address);
0717
0718   rv = ioctl(fd, I2C_TENBIT, 0UL);
0719   rtems_test_assert(rv == 0);
0720   rtems_test_assert(!bus->base.ten_bit_address);
0721
0722   rtems_test_assert(!bus->base.use_pec);
0723
0724   rv = ioctl(fd, I2C_PEC, 1UL);
0725   rtems_test_assert(rv == 0);
0726   rtems_test_assert(bus->base.use_pec);
0727
0728   rv = ioctl(fd, I2C_PEC, 0UL);
0729   rtems_test_assert(rv == 0);
0730   rtems_test_assert(!bus->base.use_pec);
0731
0732   rv = ioctl(fd, I2C_SLAVE, 123UL);
0733   rtems_test_assert(rv == 0);
0734   rtems_test_assert(bus->base.default_address == 123);
0735
0736   rv = ioctl(fd, I2C_SLAVE_FORCE, 456UL);
0737   rtems_test_assert(rv == 0);
0738   rtems_test_assert(bus->base.default_address == 456);
0739
0740   rtems_test_assert(bus->base.retries == 0);
0741
0742   rv = ioctl(fd, I2C_RETRIES, 1UL);
0743   rtems_test_assert(rv == 0);
0744   rtems_test_assert(bus->base.retries == 1);
0745
0746   rv = ioctl(fd, I2C_RETRIES, 0UL);
0747   rtems_test_assert(rv == 0);
0748   rtems_test_assert(bus->base.retries == 0);
0749
0750   rtems_test_assert(bus->base.timeout == 0);
0751
0752   rv = ioctl(fd, I2C_TIMEOUT, 1UL);
0753   rtems_test_assert(rv == 0);
0754   rtems_test_assert(bus->base.timeout == 5);
0755
0756   rv = ioctl(fd, I2C_TIMEOUT, 0UL);
0757   rtems_test_assert(rv == 0);
0758   rtems_test_assert(bus->base.timeout == 0);
0759
0760   test_simple_read_write(bus, fd);
0761   test_nonblock_read_write(bus, fd);
0762   test_eeprom(bus);
0763   test_gpio_nxp_pca9535();
0764   test_switch_nxp_pca9548a();
0765
0766   rv = close(fd);
0767   rtems_test_assert(rv == 0);
0768
0769   rv = unlink(&bus_path[0]);
0770   rtems_test_assert(rv == 0);
0771
0772   rtems_test_assert(rtems_resource_snapshot_check(&snapshot));
0773 }
0774
0775 static void Init(rtems_task_argument arg)
0776 {
0777   TEST_BEGIN();
0778
0779   test();
0780
0781   TEST_END();
0782   rtems_test_exit(0);
0783 }
0784
0785 #define CONFIGURE_MICROSECONDS_PER_TICK 2000
0786
0787 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
0788 #define CONFIGURE_APPLICATION_NEEDS_SIMPLE_CONSOLE_DRIVER
0789
0790 #define CONFIGURE_MAXIMUM_FILE_DESCRIPTORS 7
0791
0792 #define CONFIGURE_MAXIMUM_TASKS 2
0793
0794 #define CONFIGURE_MAXIMUM_SEMAPHORES 1
0795
0796 #define CONFIGURE_INIT_TASK_STACK_SIZE (RTEMS_MINIMUM_STACK_SIZE + 2 * EEPROM_SIZE)
0797
0798 #define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION
0799
0800 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
0801
0802 #define CONFIGURE_INIT
0803
0804 #include <rtems/confdefs.h>