Warning, /spec/build/bsps/optzynquartkernbase.yml is written in an unsupported language. File is not indexed.
0001 SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
0002 actions:
0003 - get-string: null
0004 - define-unquoted: null
0005 build-type: option
0006 copyrights:
0007 - Copyright (C) 2024 embedded brains GmbH & Co. KG
0008 default:
0009 - enabled-by: ZYNQMP_RPU_SPLIT_INDEX_1
0010 value: ZYNQ_UART_1_BASE_ADDR
0011 - enabled-by:
0012 - bsps/aarch64/xilinx-zynqmp
0013 - bsps/arm/xilinx-zynqmp-rpu
0014 - ZYNQMP_RPU_SPLIT_INDEX_0
0015 value: ZYNQ_UART_0_BASE_ADDR
0016 - enabled-by: true
0017 value: ZYNQ_UART_1_BASE_ADDR
0018 description: |
0019 This option defines the Xilinx Zynq UART base address used by the kernel I/O
0020 device.
0021 enabled-by: true
0022 format: '{}'
0023 links: []
0024 name: ZYNQ_UART_KERNEL_IO_BASE_ADDR
0025 type: build
