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Warning, /spec/build/bsps/aarch64/xilinx-zynqmp/linkcmds_lp64.yml is written in an unsupported language. File is not indexed.

0001 SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
0002 build-type: config-file
0003 content: |
0004   /* SPDX-License-Identifier: BSD-2-Clause */
0005 
0006   /*
0007    * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
0008    * Written by Kinsey Moore <kinsey.moore@oarcorp.com>
0009    *
0010    * Copyright (C) 2024 Contemporary Software (Chris Johns)
0011    *
0012    * Redistribution and use in source and binary forms, with or without
0013    * modification, are permitted provided that the following conditions
0014    * are met:
0015    * 1. Redistributions of source code must retain the above copyright
0016    *    notice, this list of conditions and the following disclaimer.
0017    * 2. Redistributions in binary form must reproduce the above copyright
0018    *    notice, this list of conditions and the following disclaimer in the
0019    *    documentation and/or other materials provided with the distribution.
0020    *
0021    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0022    * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0023    * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0024    * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0025    * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0026    * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0027    * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0028    * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0029    * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0030    * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0031    * POSSIBILITY OF SUCH DAMAGE.
0032    */
0033 
0034   /*
0035    * The RAM supports 36G of DDR4 using the DDR Memory Controller.
0036    *
0037    * The DDR Conroller (DDRC) supports two regions. The first covers
0038    * the A32 address space up to the 2G mark and the second region is in
0039    * the A64 address space at 0x000800000000 for 32G.
0040    */
0041   DDRMC_REGION_0_BASE = 0x00000000000;
0042   DDRMC_REGION_0_LENGTH = 0x00080000000;
0043   DDRMC_REGION_1_BASE = 0x00800000000;
0044   DDRMC_REGION_1_LENGTH = 0x00800000000;
0045 
0046   BSP_RAM_BASE = ${BSP_XILINX_ZYNQMP_RAM_BASE};
0047 
0048   BSP_R0_RAM_BASE = DDRMC_REGION_0_BASE;
0049   BSP_R0_RAM_LENGTH =
0050      ${BSP_XILINX_ZYNQMP_RAM_LENGTH} >= DDRMC_REGION_0_LENGTH ?
0051          DDRMC_REGION_0_LENGTH - BSP_RAM_BASE : ${BSP_XILINX_ZYNQMP_RAM_LENGTH};
0052   BSP_R0_RAM_END = BSP_RAM_BASE + BSP_R0_RAM_LENGTH;
0053 
0054   BSP_R1_RAM_BASE = DDRMC_REGION_1_BASE;
0055   BSP_R1_RAM_LENGTH =
0056      ${BSP_XILINX_ZYNQMP_RAM_LENGTH} >= DDRMC_REGION_0_LENGTH ?
0057          ${BSP_XILINX_ZYNQMP_RAM_LENGTH} - DDRMC_REGION_0_LENGTH : 0;
0058 
0059   AARCH64_MMU_TT_PAGES_SIZE = 0x1000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES};
0060 
0061   MEMORY {
0062     RAM       : ORIGIN = BSP_RAM_BASE + ${BSP_XILINX_ZYNQMP_LOAD_OFFSET},
0063                 LENGTH = BSP_R0_RAM_LENGTH - ${BSP_XILINX_ZYNQMP_LOAD_OFFSET} - ${BSP_XILINX_ZYNQMP_NOCACHE_LENGTH} - AARCH64_MMU_TT_PAGES_SIZE
0064     RAM1      : ORIGIN = BSP_R1_RAM_BASE,
0065                 LENGTH = BSP_R1_RAM_LENGTH
0066     NOCACHE   : ORIGIN = BSP_RAM_BASE + BSP_R0_RAM_LENGTH - AARCH64_MMU_TT_PAGES_SIZE - ${BSP_XILINX_ZYNQMP_NOCACHE_LENGTH},
0067                 LENGTH = ${BSP_XILINX_ZYNQMP_NOCACHE_LENGTH}
0068     RAM_MMU   : ORIGIN = BSP_R0_RAM_END - AARCH64_MMU_TT_PAGES_SIZE,
0069                 LENGTH = AARCH64_MMU_TT_PAGES_SIZE
0070   }
0071 
0072   REGION_ALIAS ("REGION_START",          RAM);
0073   REGION_ALIAS ("REGION_VECTOR",         RAM);
0074   REGION_ALIAS ("REGION_TEXT",           RAM);
0075   REGION_ALIAS ("REGION_TEXT_LOAD",      RAM);
0076   REGION_ALIAS ("REGION_RODATA",         RAM);
0077   REGION_ALIAS ("REGION_RODATA_LOAD",    RAM);
0078   REGION_ALIAS ("REGION_DATA",           RAM);
0079   REGION_ALIAS ("REGION_DATA_LOAD",      RAM);
0080   REGION_ALIAS ("REGION_FAST_TEXT",      RAM);
0081   REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
0082   REGION_ALIAS ("REGION_FAST_DATA",      RAM);
0083   REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
0084   REGION_ALIAS ("REGION_BSS",            RAM);
0085   REGION_ALIAS ("REGION_WORK",           RAM);
0086   REGION_ALIAS ("REGION_STACK",          RAM);
0087   REGION_ALIAS ("REGION_NOCACHE",        NOCACHE);
0088   REGION_ALIAS ("REGION_NOCACHE_LOAD",   NOCACHE);
0089 
0090   bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ? bsp_stack_exception_size : 1024;
0091 
0092   bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
0093 
0094   bsp_vector_table_in_start_section = 1;
0095 
0096   bsp_r0_ram_base = DDRMC_REGION_0_BASE;
0097   bsp_r0_ram_end = ORIGIN (RAM) + LENGTH (RAM);
0098   bsp_r1_ram_base = ORIGIN (RAM1);
0099   bsp_r1_ram_end = ORIGIN (RAM1) + LENGTH (RAM1);
0100 
0101   bsp_translation_table_base = ORIGIN (RAM_MMU);
0102   bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
0103 
0104   OUTPUT_FORMAT ("elf64-littleaarch64")
0105   OUTPUT_ARCH (aarch64)
0106 
0107   INCLUDE linkcmds.base
0108 copyrights:
0109 - Copyright (C) 2020 On-Line Applications Research (OAR)
0110 - Copyright (C) 2024 Contemporary Software (Chris Johns)
0111 enabled-by: true
0112 install-path: ${BSP_LIBDIR}
0113 links: []
0114 target: linkcmds
0115 type: build