score/src/isr.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSScoreISR
0007  *
0008  * @brief This source file contains the definition of ::_ISR_Vector_table and
0009  *   the implementation of _ISR_Handler_initialization().
0010  */
0011
0012 /*
0013  *  COPYRIGHT (c) 1989-2012.
0014  *  On-Line Applications Research Corporation (OAR).
0015  *
0016  * Redistribution and use in source and binary forms, with or without
0017  * modification, are permitted provided that the following conditions
0018  * are met:
0019  * 1. Redistributions of source code must retain the above copyright
0020  *    notice, this list of conditions and the following disclaimer.
0021  * 2. Redistributions in binary form must reproduce the above copyright
0022  *    notice, this list of conditions and the following disclaimer in the
0023  *    documentation and/or other materials provided with the distribution.
0024  *
0025  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0026  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0027  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0028  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0029  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0030  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0031  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0032  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0033  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0034  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0035  * POSSIBILITY OF SUCH DAMAGE.
0036  */
0037
0038 #ifdef HAVE_CONFIG_H
0039 #include "config.h"
0040 #endif
0041
0042 #include <rtems/score/isr.h>
0043 #include <rtems/score/address.h>
0044 #include <rtems/score/percpu.h>
0045 #include <rtems/config.h>
0046
0047 const char * const volatile _ISR_Stack_size_object = _ISR_Stack_size;
0048
0049 void _ISR_Handler_initialization( void )
0050 {
0051   uint32_t  cpu_max;
0052   uint32_t  cpu_index;
0053   size_t    stack_size;
0054   char     *stack_low;
0055
0056   stack_size = rtems_configuration_get_interrupt_stack_size();
0057   cpu_max = rtems_configuration_get_maximum_processors();
0058   stack_low = _ISR_Stack_area_begin;
0059
0060   for ( cpu_index = 0 ; cpu_index < cpu_max; ++cpu_index ) {
0061     Per_CPU_Control *cpu;
0062     char            *stack_high;
0063
0064     cpu = _Per_CPU_Get_by_index( cpu_index );
0065     stack_high = _Addresses_Add_offset( stack_low, stack_size );
0066
0067     cpu->interrupt_stack_low = stack_low;
0068     cpu->interrupt_stack_high = stack_high;
0069
0070     /*
0071      * Interrupt stack might have to be aligned and/or setup in a specific
0072      * way.  Do not use the local low or high variables here since
0073      * _CPU_Interrupt_stack_setup() is a nasty macro that might want to play
0074      * with the real memory locations.
0075      */
0076 #if defined(_CPU_Interrupt_stack_setup)
0077     _CPU_Interrupt_stack_setup(
0078       cpu->interrupt_stack_low,
0079       cpu->interrupt_stack_high
0080     );
0081 #endif
0082
0083     stack_low = stack_high;
0084   }
0085 }