cpu/riscv/riscv-exception-frame-print.c

0001 /*
0002  * Copyright (c) 2018 embedded brains GmbH & Co. KG
0003  * Copyright (c) 2015 Hesham Almatary <hesham@alumni.york.ac.uk>
0004  *
0005  * Redistribution and use in source and binary forms, with or without
0006  * modification, are permitted provided that the following conditions
0007  * are met:
0008  * 1. Redistributions of source code must retain the above copyright
0009  *    notice, this list of conditions and the following disclaimer.
0010  * 2. Redistributions in binary form must reproduce the above copyright
0011  *    notice, this list of conditions and the following disclaimer in the
0012  *    documentation and/or other materials provided with the distribution.
0013  *
0014  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
0015  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0016  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0017  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
0018  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
0019  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
0020  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
0021  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
0022  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
0023  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
0024  * SUCH DAMAGE.
0025  */
0026
0027 #ifdef HAVE_CONFIG_H
0028 #include "config.h"
0029 #endif
0030
0031 #include <rtems/score/cpu.h>
0032 #include <rtems/bspIo.h>
0033 #include <inttypes.h>
0034
0035 #if __riscv_xlen == 32
0036 #define PRINT_REG "0x%08" PRIxPTR
0037 #elif __riscv_xlen == 64
0038 #define PRINT_REG "0x%016" PRIxPTR
0039 #endif
0040
0041 void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
0042 {
0043   printk("mstatus 0x%08" PRIxPTR "\n", frame->Interrupt_frame.mstatus);
0044   printk("mcause  " PRINT_REG "\n", frame->mcause);
0045   printk("mepc    " PRINT_REG "\n", frame->Interrupt_frame.mepc);
0046   printk("ra      " PRINT_REG "\n", frame->Interrupt_frame.ra);
0047   printk("sp      " PRINT_REG "\n", frame->sp);
0048   printk("gp      " PRINT_REG "\n", frame->gp);
0049   printk("tp      " PRINT_REG "\n", frame->tp);
0050   printk("t0      " PRINT_REG "\n", frame->Interrupt_frame.t0);
0051   printk("t1      " PRINT_REG "\n", frame->Interrupt_frame.t1);
0052   printk("t2      " PRINT_REG "\n", frame->Interrupt_frame.t2);
0053   printk("s0      " PRINT_REG "\n", frame->Interrupt_frame.s0);
0054   printk("s1      " PRINT_REG "\n", frame->Interrupt_frame.s1);
0055   printk("a0      " PRINT_REG "\n", frame->Interrupt_frame.a0);
0056   printk("a1      " PRINT_REG "\n", frame->Interrupt_frame.a1);
0057   printk("a2      " PRINT_REG "\n", frame->Interrupt_frame.a2);
0058   printk("a3      " PRINT_REG "\n", frame->Interrupt_frame.a3);
0059   printk("a4      " PRINT_REG "\n", frame->Interrupt_frame.a4);
0060   printk("a5      " PRINT_REG "\n", frame->Interrupt_frame.a5);
0061   printk("a6      " PRINT_REG "\n", frame->Interrupt_frame.a6);
0062   printk("a7      " PRINT_REG "\n", frame->Interrupt_frame.a7);
0063   printk("s2      " PRINT_REG "\n", frame->s2);
0064   printk("s3      " PRINT_REG "\n", frame->s3);
0065   printk("s4      " PRINT_REG "\n", frame->s4);
0066   printk("s5      " PRINT_REG "\n", frame->s5);
0067   printk("s6      " PRINT_REG "\n", frame->s6);
0068   printk("s7      " PRINT_REG "\n", frame->s7);
0069   printk("s8      " PRINT_REG "\n", frame->s8);
0070   printk("s9      " PRINT_REG "\n", frame->s9);
0071   printk("s10     " PRINT_REG "\n", frame->s10);
0072   printk("s11     " PRINT_REG "\n", frame->s11);
0073   printk("t3      " PRINT_REG "\n", frame->Interrupt_frame.t3);
0074   printk("t4      " PRINT_REG "\n", frame->Interrupt_frame.t4);
0075   printk("t5      " PRINT_REG "\n", frame->Interrupt_frame.t5);
0076   printk("t6      " PRINT_REG "\n", frame->Interrupt_frame.t6);
0077 #if __riscv_flen > 0
0078   printk("fcsr    0x%08" PRIx32 "\n", frame->Interrupt_frame.fcsr);
0079 #endif /* __riscv_flen */
0080 }