cpu/riscv/riscv-counter.S

0001 /*
0002  * Copyright (c) 2018 embedded brains GmbH & Co. KG
0003  *
0004  * Redistribution and use in source and binary forms, with or without
0005  * modification, are permitted provided that the following conditions
0006  * are met:
0007  * 1. Redistributions of source code must retain the above copyright
0008  *    notice, this list of conditions and the following disclaimer.
0009  * 2. Redistributions in binary form must reproduce the above copyright
0010  *    notice, this list of conditions and the following disclaimer in the
0011  *    documentation and/or other materials provided with the distribution.
0012  *
0013  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
0014  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0015  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0016  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
0017  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
0018  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
0019  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
0020  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
0021  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
0022  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
0023  * SUCH DAMAGE.
0024  */
0025
0026 #if __riscv_xlen == 32
0027 #define PTR_ALIGN 2
0028 #define PTR_SIZE 4
0029 #define PTR_VALUE .word
0030 #elif __riscv_xlen == 64
0031 #define PTR_ALIGN 3
0032 #define PTR_SIZE 8
0033 #define PTR_VALUE .dword
0034 #endif
0035
0036     .section    .sdata, "aw"
0037     .align  PTR_ALIGN
0038
0039     .globl  _RISCV_Counter
0040     .type   _RISCV_Counter, @object
0041     .size   _RISCV_Counter, PTR_SIZE
0042 _RISCV_Counter:
0043
0044     .globl  _RISCV_Counter_mutable
0045     .type   _RISCV_Counter_mutable, @object
0046     .size   _RISCV_Counter_mutable, PTR_SIZE
0047 _RISCV_Counter_mutable:
0048
0049     PTR_VALUE   _RISCV_Counter_register