cpu/powerpc/ppc-context-volatile-clobber.S

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027
0028 #ifdef HAVE_CONFIG_H
0029 #include "config.h"
0030 #endif
0031
0032 #include <rtems/asm.h>
0033 #include <rtems/score/cpu.h>
0034
0035     .global _CPU_Context_volatile_clobber
0036
0037 _CPU_Context_volatile_clobber:
0038
0039 #ifdef PPC_MULTILIB_FPU
0040 .macro CLOBBER_F i
0041     addi    r4, r3, 0x100 + \i
0042     stw r4, 32(r1)
0043     addi    r4, r3, 0x200 + \i
0044     stw r4, 32 + 4(r1)
0045     lfd \i, 32(r1)
0046 .endm
0047
0048     PPC_REG_STORE_UPDATE    r1, -96(r1)
0049
0050     /* Negate FPSCR[FPRF] bits */
0051     mffs    f0
0052     stfd    f0, 32(r1)
0053     lwz r0, 36(r1)
0054     nor r3, r0, r0
0055     rlwinm  r0, r0, 0, 20, 14
0056     rlwinm  r3, r3, 0, 15, 19
0057     or  r0, r3, r0
0058     stw r0, 36(r1)
0059     lfd f0, 32(r1)
0060     mtfsf   0xff, f0
0061
0062     CLOBBER_F 0
0063     CLOBBER_F 1
0064     CLOBBER_F 2
0065     CLOBBER_F 3
0066     CLOBBER_F 4
0067     CLOBBER_F 5
0068     CLOBBER_F 6
0069     CLOBBER_F 7
0070     CLOBBER_F 8
0071     CLOBBER_F 9
0072     CLOBBER_F 10
0073     CLOBBER_F 11
0074     CLOBBER_F 12
0075     CLOBBER_F 13
0076     addi    r1, r1, 96
0077 #endif
0078
0079 #ifdef PPC_MULTILIB_ALTIVEC
0080 .macro CLOBBER_V i
0081     addi    r4, r3, 0x300 + \i
0082     stw r4, 32(r1)
0083     addi    r4, r3, 0x400 + \i
0084     stw r4, 32 + 4(r1)
0085     addi    r4, r3, 0x500 + \i
0086     stw r4, 32 + 8(r1)
0087     addi    r4, r3, 0x600 + \i
0088     stw r4, 32 + 12(r1)
0089     li  r4, 32
0090     lvx \i, r1, r4
0091 .endm
0092
0093     PPC_REG_STORE_UPDATE    r1, -96(r1)
0094
0095     /* Negate VSCR[SAT] bit */
0096     mfvscr  v0
0097     li  r3, 44
0098     stvewx  v0, r1, r3
0099     lwz r0, 44(r1)
0100     nor r3, r0, r0
0101     rlwinm  r0, r0, 0, 0, 30
0102     rlwinm  r3, r3, 0, 31, 31
0103     or  r0, r3, r0
0104     stw r0, 44(r1)
0105     li  r3, 44
0106     lvewx   v0, r1, r3
0107     mtvscr  v0
0108
0109     CLOBBER_V 0
0110     CLOBBER_V 1
0111     CLOBBER_V 2
0112     CLOBBER_V 3
0113     CLOBBER_V 4
0114     CLOBBER_V 5
0115     CLOBBER_V 6
0116     CLOBBER_V 7
0117     CLOBBER_V 8
0118     CLOBBER_V 9
0119     CLOBBER_V 10
0120     CLOBBER_V 11
0121     CLOBBER_V 12
0122     CLOBBER_V 13
0123     CLOBBER_V 14
0124     CLOBBER_V 15
0125     CLOBBER_V 16
0126     CLOBBER_V 17
0127     CLOBBER_V 18
0128     CLOBBER_V 19
0129     addi    r1, r1, 96
0130 #endif
0131
0132     addi    r4, r3, 10
0133     rlwinm  r4, r4, 0, 20, 7
0134     mfcr    r5
0135     rlwinm  r5, r5, 0, 8, 19
0136     or  r4, r4, r5
0137     mtcr    r4
0138     addi    r4, r3, 11
0139     mtctr   r4
0140     addi    r4, r3, 12
0141     mtxer   r4
0142     addi    r0, r3, 13
0143     addi    r4, r3, 1
0144     addi    r5, r3, 2
0145     addi    r6, r3, 3
0146     addi    r7, r3, 4
0147     addi    r8, r3, 5
0148     addi    r9, r3, 6
0149     addi    r10, r3, 7
0150     addi    r11, r3, 8
0151     addi    r12, r3, 9
0152     blr