cpu/nios2/nios2-isr-get-level.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * Copyright (C) 2011, 2016 embedded brains GmbH & Co. KG
0005  *
0006  * Copyright (c) 2006 Kolja Waschk (rtemsdev/ixo.de)
0007  *
0008  * COPYRIGHT (c) 1989-2006
0009  * On-Line Applications Research Corporation (OAR).
0010  *
0011  * Redistribution and use in source and binary forms, with or without
0012  * modification, are permitted provided that the following conditions
0013  * are met:
0014  * 1. Redistributions of source code must retain the above copyright
0015  *    notice, this list of conditions and the following disclaimer.
0016  * 2. Redistributions in binary form must reproduce the above copyright
0017  *    notice, this list of conditions and the following disclaimer in the
0018  *    documentation and/or other materials provided with the distribution.
0019  *
0020  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0021  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0022  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0023  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0024  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0025  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0026  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0027  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0028  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0029  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0030  * POSSIBILITY OF SUCH DAMAGE.
0031  */
0032
0033 #ifdef HAVE_CONFIG_H
0034 #include "config.h"
0035 #endif
0036
0037 #include <rtems/score/cpu.h>
0038 #include <rtems/score/interr.h>
0039 #include <rtems/score/nios2-utility.h>
0040
0041 bool _CPU_ISR_Is_enabled( uint32_t level )
0042 {
0043   switch ( _Nios2_ISR_Get_status_mask() ) {
0044     case NIOS2_ISR_STATUS_MASK_EIC_IL:
0045       return ((level & NIOS2_STATUS_IL_MASK) >> NIOS2_STATUS_IL_OFFSET) == 0;
0046     case NIOS2_ISR_STATUS_MASK_EIC_RSIE:
0047       return (level & NIOS2_STATUS_RSIE) != 0;
0048     default:
0049       return (level & NIOS2_STATUS_PIE) != 0;
0050   }
0051 }
0052
0053 uint32_t _CPU_ISR_Get_level( void )
0054 {
0055   uint32_t status = _Nios2_Get_ctlreg_status();
0056   uint32_t level = 0;
0057
0058   switch ( _Nios2_ISR_Get_status_mask() ) {
0059     case NIOS2_ISR_STATUS_MASK_IIC:
0060       level = (status & NIOS2_STATUS_PIE) == 0;
0061       break;
0062     case NIOS2_ISR_STATUS_MASK_EIC_IL:
0063       level = (status & NIOS2_STATUS_IL_MASK) >> NIOS2_STATUS_IL_OFFSET;
0064       break;
0065     case NIOS2_ISR_STATUS_MASK_EIC_RSIE:
0066       level = (status & NIOS2_STATUS_RSIE) == 0;
0067       break;
0068     default:
0069       /* FIXME */
0070       _Terminate( INTERNAL_ERROR_CORE, 0xdeadbeef );
0071       break;
0072   }
0073
0074   return level;
0075 }