cpu/nios2/nios2-context-initialize.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * Copyright (C) 2011, 2021 embedded brains GmbH & Co. KG
0005  *
0006  * Copyright (c) 2006 Kolja Waschk (rtemsdev/ixo.de)
0007  *
0008  * COPYRIGHT (c) 1989-2006
0009  * On-Line Applications Research Corporation (OAR).
0010  *
0011  * Redistribution and use in source and binary forms, with or without
0012  * modification, are permitted provided that the following conditions
0013  * are met:
0014  * 1. Redistributions of source code must retain the above copyright
0015  *    notice, this list of conditions and the following disclaimer.
0016  * 2. Redistributions in binary form must reproduce the above copyright
0017  *    notice, this list of conditions and the following disclaimer in the
0018  *    documentation and/or other materials provided with the distribution.
0019  *
0020  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0021  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0022  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0023  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0024  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0025  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0026  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0027  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0028  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0029  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0030  * POSSIBILITY OF SUCH DAMAGE.
0031  */
0032
0033 #ifdef HAVE_CONFIG_H
0034 #include "config.h"
0035 #endif
0036
0037 #include <string.h>
0038
0039 #include <rtems/score/cpu.h>
0040 #include <rtems/score/nios2-utility.h>
0041 #include <rtems/score/interr.h>
0042 #include <rtems/score/tls.h>
0043
0044 void _CPU_Context_Initialize(
0045   Context_Control *context,
0046   void *stack_area_begin,
0047   size_t stack_area_size,
0048   uint32_t new_level,
0049   void (*entry_point)( void ),
0050   bool is_fp,
0051   void *tls_area
0052 )
0053 {
0054   const Nios2_MPU_Configuration *mpu_config = _Nios2_MPU_Get_configuration();
0055   uint32_t stack = (uint32_t) stack_area_begin + stack_area_size - 4;
0056
0057   memset(context, 0, sizeof(*context));
0058
0059   context->fp = stack;
0060   context->status = _Nios2_ISR_Set_level( new_level, NIOS2_STATUS_PIE );
0061   context->sp = stack;
0062   context->ra = (uint32_t) entry_point;
0063
0064   if ( mpu_config != NULL ) {
0065     Nios2_MPU_Region_descriptor desc = {
0066       .index = mpu_config->data_index_for_stack_protection,
0067       .base = stack_area_begin,
0068       .end = (const void *) RTEMS_ALIGN_UP(
0069         (uintptr_t) stack_area_begin + stack_area_size +
0070           _TLS_Get_allocation_size(),
0071         1U << mpu_config->data_region_size_log2
0072       ),
0073       .perm = NIOS2_MPU_DATA_PERM_SVR_READWRITE_USER_NONE,
0074       .data = true,
0075       .cacheable = mpu_config->enable_data_cache_for_stack,
0076       .read = false,
0077       .write = true
0078     };
0079     bool ok = _Nios2_MPU_Setup_region_registers(
0080       mpu_config,
0081       &desc,
0082       &context->stack_mpubase,
0083       &context->stack_mpuacc
0084     );
0085
0086     if ( !ok ) {
0087       /* The task stack allocator must ensure that the stack area is valid */
0088       _Terminate( INTERNAL_ERROR_CORE, 0xdeadbeef );
0089     }
0090   }
0091
0092   if ( tls_area != NULL ) {
0093     context->r23 = (uintptr_t) _TLS_Initialize_area( tls_area ) + 0x7000;
0094   }
0095 }