File indexing completed on 2025-05-11 08:24:24
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019
0020
0021
0022
0023
0024
0025
0026
0027
0028
0029 #ifndef _RTEMS_ASM_H
0030 #define _RTEMS_ASM_H
0031
0032
0033
0034
0035
0036 #ifndef ASM
0037 #define ASM
0038 #endif
0039 #include <rtems/score/cpuopts.h>
0040 #include <rtems/score/i386.h>
0041 #include <rtems/score/percpu.h>
0042
0043
0044
0045
0046
0047
0048
0049
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059 #ifndef __USER_LABEL_PREFIX__
0060 #define __USER_LABEL_PREFIX__
0061 #endif
0062
0063
0064
0065
0066
0067
0068
0069 #undef __REGISTER_PREFIX__
0070 #define __REGISTER_PREFIX__ %
0071
0072
0073
0074
0075
0076
0077
0078 #include <rtems/concat.h>
0079
0080
0081
0082 #define SYM(x) CONCAT0 (__USER_LABEL_PREFIX__, x)
0083
0084
0085
0086 #define REG(x) CONCAT0 (__REGISTER_PREFIX__, x)
0087
0088 #define eax REG (eax)
0089 #define ebx REG (ebx)
0090 #define ecx REG (ecx)
0091 #define edx REG (edx)
0092 #define esi REG (esi)
0093 #define edi REG (edi)
0094 #define esp REG (esp)
0095 #define ebp REG (ebp)
0096 #define cr0 REG (cr0)
0097 #define cr4 REG (cr4)
0098
0099 #define ax REG (ax)
0100 #define bx REG (bx)
0101 #define cx REG (cx)
0102 #define dx REG (dx)
0103 #define si REG (si)
0104 #define di REG (di)
0105 #define sp REG (sp)
0106 #define bp REG (bp)
0107
0108 #define ah REG (ah)
0109 #define bh REG (bh)
0110 #define ch REG (ch)
0111 #define dh REG (dh)
0112
0113 #define al REG (al)
0114 #define bl REG (bl)
0115 #define cl REG (cl)
0116 #define dl REG (dl)
0117
0118 #define cs REG (cs)
0119 #define ds REG (ds)
0120 #define es REG (es)
0121 #define fs REG (fs)
0122 #define gs REG (gs)
0123 #define ss REG (ss)
0124
0125
0126
0127
0128
0129
0130 #define BEGIN_CODE_DCL .text
0131 #define END_CODE_DCL
0132 #define BEGIN_DATA_DCL .data
0133 #define END_DATA_DCL
0134 #define BEGIN_CODE .text
0135 #define END_CODE
0136 #define BEGIN_DATA .data
0137 #define END_DATA
0138 #define BEGIN_BSS .bss
0139 #define END_BSS
0140 #define END
0141
0142
0143
0144
0145
0146
0147 #define PUBLIC(sym) .globl SYM (sym)
0148 #define EXTERN(sym) .globl SYM (sym)
0149
0150 #ifdef RTEMS_SMP
0151 .macro GET_CPU_ID REG
0152 .set LAPIC_ID, 0x20
0153 .set LAPIC_ID_SHIFT, 0x18L
0154 movl imps_lapic_addr,\REG
0155 movl LAPIC_ID(\REG),\REG
0156 shrl $LAPIC_ID_SHIFT,\REG
0157 movzbl imps_apic_cpu_map(\REG),\REG
0158 .endm
0159
0160 .macro GET_SELF_CPU_CONTROL REG
0161 GET_CPU_ID \REG
0162 shll $PER_CPU_CONTROL_SIZE_LOG2,\REG
0163 leal _Per_CPU_Information(\REG),\REG
0164 .endm
0165 #else
0166 .macro GET_CPU_ID REG
0167 movl $0,\REG
0168 .endm
0169
0170 .macro GET_SELF_CPU_CONTROL REG
0171 leal _Per_CPU_Information, \REG
0172 .endm
0173 #endif
0174
0175
0176
0177 #endif