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File indexing completed on 2025-05-11 08:24:23

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSScoreCPUARM
0007  *
0008  * @brief This source file contains the implementation of _CPU_Initialize().
0009  */
0010 
0011 /*
0012  * Copyright (C) 2020 embedded brains GmbH & Co. KG
0013  * Copyright (C) 2011 Sebastian Huber
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036 
0037 #ifdef HAVE_CONFIG_H
0038 #include "config.h"
0039 #endif
0040 
0041 #include <rtems/score/armv7m.h>
0042 
0043 #ifdef ARM_MULTILIB_ARCH_V7M
0044 
0045 void _CPU_Initialize( void )
0046 {
0047   /*
0048    * The exception handler used to carry out the thead dispatching must have
0049    * the lowest priority possible.  No other exception handlers must have this
0050    * priority if they use services that may lead to a thread dispatch.  See
0051    * also "ARMv7-M Architecture Reference Manual, Issue D" section B1.5.4
0052    * "Exception priorities and preemption".
0053    */
0054   _ARMV7M_Set_exception_priority(
0055     ARMV7M_VECTOR_SVC,
0056     ARMV7M_EXCEPTION_PRIORITY_LOWEST
0057   );
0058   _ARMV7M_Set_exception_priority(
0059     ARMV7M_VECTOR_PENDSV,
0060     ARMV7M_EXCEPTION_PRIORITY_LOWEST
0061   );
0062 }
0063 
0064 #endif /* ARM_MULTILIB_ARCH_V7M */