cpu/arm/armv4-isr-install-vector.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSScoreCPUARM
0007  *
0008  * @brief This source file contains the ARM-specific _CPU_ISR_install_vector().
0009  */
0010
0011 /*
0012  *  COPYRIGHT (c) 2000 Canon Research Centre France SA.
0013  *  Emmanuel Raguet, mailto:raguet@crf.canon.fr
0014  *
0015  *  Copyright (c) 2002 Advent Networks, Inc
0016  *      Jay Monkman <jmonkman@adventnetworks.com>
0017  *
0018  *  Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG
0019  *
0020  * Redistribution and use in source and binary forms, with or without
0021  * modification, are permitted provided that the following conditions
0022  * are met:
0023  * 1. Redistributions of source code must retain the above copyright
0024  *    notice, this list of conditions and the following disclaimer.
0025  * 2. Redistributions in binary form must reproduce the above copyright
0026  *    notice, this list of conditions and the following disclaimer in the
0027  *    documentation and/or other materials provided with the distribution.
0028  *
0029  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0030  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0031  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0032  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0033  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0034  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0035  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0036  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0037  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0038  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0039  * POSSIBILITY OF SUCH DAMAGE.
0040  */
0041
0042 #ifdef HAVE_CONFIG_H
0043 #include "config.h"
0044 #endif
0045
0046 #include <rtems/score/cpu.h>
0047
0048 #ifdef ARM_MULTILIB_ARCH_V4
0049
0050 void _CPU_ISR_install_vector(
0051   uint32_t         vector,
0052   CPU_ISR_handler  new_handler,
0053   CPU_ISR_handler *old_handler
0054 )
0055 {
0056 #pragma GCC diagnostic push
0057 #pragma GCC diagnostic ignored "-Warray-bounds"
0058   /* Redirection table starts at the end of the vector table */
0059   CPU_ISR_handler volatile  *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4);
0060
0061   CPU_ISR_handler current_handler = table [vector];
0062
0063   /* The current handler is now the old one */
0064   if (old_handler != NULL) {
0065     *old_handler = current_handler;
0066   }
0067
0068   /* Write only if necessary to avoid writes to a maybe read-only memory */
0069   if (current_handler != new_handler) {
0070     table [vector] = new_handler;
0071   }
0072 #pragma GCC diagnostic pop
0073 }
0074
0075 #endif /* ARM_MULTILIB_ARCH_V4 */