cpu/arm/arm_exc_abort.S

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSScoreCPUARM
0007  *
0008  * @brief ARM data and prefetch abort exception prologue and epilogue.
0009  */
0010
0011 /*
0012  * Copyright (c) 2009 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #ifdef HAVE_CONFIG_H
0037 #include "config.h"
0038 #endif
0039
0040 #include <rtems/asm.h>
0041
0042 #ifdef ARM_MULTILIB_ARCH_V4
0043
0044 .extern _ARM_Exception_default
0045
0046 .globl _ARMV4_Exception_data_abort_set_handler
0047 .globl _ARMV4_Exception_data_abort
0048
0049 .globl _ARMV4_Exception_prefetch_abort_set_handler
0050 .globl _ARMV4_Exception_prefetch_abort
0051
0052 .section ".bss"
0053
0054 data_abort_handler:
0055 .long 0
0056
0057 prefetch_abort_handler:
0058 .long 0
0059
0060 .section ".text"
0061
0062 #ifdef __thumb__
0063     .thumb_func
0064 #endif
0065
0066 _ARMV4_Exception_data_abort_set_handler:
0067     ldr r1, =data_abort_handler
0068     str r0, [r1]
0069 #ifdef __thumb__
0070     bx  lr
0071 #else
0072     mov pc, lr
0073 #endif
0074
0075 #ifdef __thumb__
0076     .thumb_func
0077 #endif
0078
0079 _ARMV4_Exception_prefetch_abort_set_handler:
0080     ldr r1, =prefetch_abort_handler
0081     str r0, [r1]
0082 #ifdef __thumb__
0083     bx  lr
0084 #else
0085     mov pc, lr
0086 #endif
0087
0088 .arm
0089
0090 _ARMV4_Exception_prefetch_abort:
0091
0092     /* Save context and load handler */
0093     sub sp, #20
0094     stmdb   sp!, {r0-r12}
0095     mov r4, #3
0096     ldr r6, =prefetch_abort_handler
0097
0098     b   save_more_context
0099
0100 _ARMV4_Exception_data_abort:
0101
0102     /* Save context and load handler */
0103     sub sp, #20
0104     stmdb   sp!, {r0-r12}
0105     mov r4, #4
0106     ldr r6, =data_abort_handler
0107
0108 save_more_context:
0109
0110     /* Save more context */
0111     mov r2, lr
0112     mrs r3, spsr
0113     mrs r7, cpsr
0114     orr r5, r3, #ARM_PSR_I
0115     bic r5, #ARM_PSR_T
0116     msr cpsr, r5
0117     mov r0, sp
0118     mov r1, lr
0119     msr cpsr, r7
0120     add r5, sp, #72
0121     stmdb   r5!, {r0-r4}
0122
0123     /* Call high level handler */
0124     ldr r2, [r6]
0125     cmp r2, #0
0126     ldreq   r2, =_ARM_Exception_default
0127     mov r0, sp
0128 #ifndef __thumb__
0129     mov lr, pc
0130     mov pc, r2
0131 #else /* __thumb__ */
0132     SWITCH_FROM_ARM_TO_THUMB    r1
0133     bl  call_handler
0134     SWITCH_FROM_THUMB_TO_ARM
0135 #endif /* __thumb__ */
0136
0137     /* Restore context */
0138     ldmia   r5!, {r0-r4}
0139     mov lr, r2
0140     msr spsr, r3
0141     ldmia   sp!, {r0-r12}
0142     add sp, #20
0143
0144     /* Return from interrupt */
0145     subs    pc, lr, #8
0146
0147 #ifdef __thumb__
0148 .thumb
0149 call_handler:
0150     bx  r2
0151 #endif /* __thumb__ */
0152
0153 #endif /* ARM_MULTILIB_ARCH_V4 */