cpu/arm/arm-context-volatile-clobber.S

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027
0028 #ifdef HAVE_CONFIG_H
0029 #include "config.h"
0030 #endif
0031
0032 #include <rtems/asm.h>
0033
0034     .section    .text
0035
0036 #ifdef __thumb__
0037 FUNCTION_THUMB_ENTRY(_CPU_Context_volatile_clobber)
0038 #else
0039 FUNCTION_ENTRY(_CPU_Context_volatile_clobber)
0040 #endif
0041
0042 .macro clobber_register reg
0043     sub r0, r0, #1
0044     mov \reg, r0
0045 .endm
0046
0047 #ifdef ARM_MULTILIB_VFP
0048     vmrs    r1, FPSCR
0049     ldr r2, =0xf000001f
0050     bic r1, r1, r2
0051     and r2, r2, r0
0052     orr r1, r1, r2
0053     vmsr    FPSCR, r1
0054
0055 .macro clobber_vfp_register reg
0056     sub r0, r0, #1
0057     vmov    \reg, r0, r0
0058 .endm
0059
0060     clobber_vfp_register    d0
0061     clobber_vfp_register    d1
0062     clobber_vfp_register    d2
0063     clobber_vfp_register    d3
0064     clobber_vfp_register    d4
0065     clobber_vfp_register    d5
0066     clobber_vfp_register    d6
0067     clobber_vfp_register    d7
0068 #ifdef ARM_MULTILIB_VFP_D32
0069     clobber_vfp_register    d16
0070     clobber_vfp_register    d17
0071     clobber_vfp_register    d18
0072     clobber_vfp_register    d19
0073     clobber_vfp_register    d20
0074     clobber_vfp_register    d21
0075     clobber_vfp_register    d22
0076     clobber_vfp_register    d23
0077     clobber_vfp_register    d24
0078     clobber_vfp_register    d25
0079     clobber_vfp_register    d26
0080     clobber_vfp_register    d27
0081     clobber_vfp_register    d28
0082     clobber_vfp_register    d29
0083     clobber_vfp_register    d30
0084     clobber_vfp_register    d31
0085 #endif /* ARM_MULTILIB_VFP_D32 */
0086 #endif /* ARM_MULTILIB_VFP */
0087
0088     clobber_register    r1
0089     clobber_register    r2
0090     clobber_register    r3
0091     clobber_register    r12
0092
0093     bx  lr
0094
0095 FUNCTION_END(_CPU_Context_volatile_clobber)