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File indexing completed on 2025-05-11 08:24:12

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @brief PCI IRQ Library
0007  */
0008 
0009 /*
0010  * COPYRIGHT (c) 2010 Cobham Gaisler AB.
0011  *
0012  * Redistribution and use in source and binary forms, with or without
0013  * modification, are permitted provided that the following conditions
0014  * are met:
0015  * 1. Redistributions of source code must retain the above copyright
0016  *    notice, this list of conditions and the following disclaimer.
0017  * 2. Redistributions in binary form must reproduce the above copyright
0018  *    notice, this list of conditions and the following disclaimer in the
0019  *    documentation and/or other materials provided with the distribution.
0020  *
0021  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0022  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0023  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0024  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0025  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0026  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0027  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0028  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0029  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0030  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0031  * POSSIBILITY OF SUCH DAMAGE.
0032  */
0033 
0034 /* IRQ handling does not have so much with PCI to do, this library depends
0035  * on the BSP to implement shared interrupts.
0036  */
0037 
0038 #ifndef __PCI_IRQ_H__
0039 #define __PCI_IRQ_H__
0040 
0041 #include <rtems/rtems/intr.h>
0042 #include <rtems/score/basedefs.h>
0043 
0044 /* PCI Handler (ISR) called when IRQ is generated by any of the PCI devices
0045  * connected to the same PCI IRQ Pin. This has been defined the same way as
0046  * rtems_interrupt_handler in order for BSPs to "direct-map" the register
0047  * and unregister functions rtems_interrupt_handler_install/remove
0048  */
0049 typedef void (*pci_isr)(void *arg);
0050 
0051 /* Get assigned system IRQ to a PCI Device. If no IRQ 0 is returned */
0052 extern int pci_dev_irq(pci_dev_t dev);
0053 
0054 /* Register shared PCI IRQ handler, but does not enable it. The system interrupt
0055  * number is read from the PCI board's PCI configuration space header iline
0056  * field. The iline field is initialized by the PCI subsystem during start up,
0057  * the ipin field is translated into a system IRQ and written to iline. The
0058  * board's driver should use the iline field as the irq argument to this
0059  * function.
0060  *
0061  * Arguments
0062  *  irq       System IRQ number, normally taken from the PCI configuration area
0063  *  isr       Function pointer to the ISR
0064  *  arg       Second argument to function isr
0065  */
0066 static inline int pci_interrupt_register(int irq, const char *info,
0067                         pci_isr isr, void *arg)
0068 {
0069     return rtems_interrupt_handler_install(irq, info,
0070                            RTEMS_INTERRUPT_SHARED, isr,
0071                            arg);
0072 }
0073 
0074 /* Unregister previously registered shared PCI IRQ handler
0075  *
0076  * Arguments
0077  *  irq       System IRQ number, normally taken from the PCI configuration area
0078  *  isr       Function pointer to the ISR
0079  *  arg       Second argument to function isr
0080  */
0081 static inline int pci_interrupt_unregister(int irq, pci_isr isr,
0082                           void *arg)
0083 {
0084     return rtems_interrupt_handler_remove(irq, isr, arg);
0085 }
0086 
0087 /* Enable shared PCI IRQ handler. This function will unmask the interrupt
0088  * controller and mark this interrupt handler ready to handle interrupts. Note
0089  * that since it is a shared interrupt handler service the interrupt may
0090  * already be enabled, however no calls to this specific handler is made
0091  * until it is enabled.
0092  *
0093  * Arguments
0094  *  irq       System IRQ number, normally taken from the PCI configuration area
0095  *  isr       Function pointer to the ISR
0096  *  arg       Second argument to function isr
0097  */
0098 static inline void pci_interrupt_unmask(int irq)
0099 {
0100     (void)rtems_interrupt_vector_enable((rtems_vector_number)irq);
0101 }
0102 
0103 /* Disable shared PCI IRQ handler. This function will mask the interrupt
0104  * controller and mark this interrupt handler not ready to receive interrupts.
0105  * Note that since it is a shared interrupt handler service the interrupt may
0106  * still be enabled, however no calls to this specific handler is made
0107  * while it is disabled.
0108  *
0109  * Arguments
0110  *  irq       System IRQ number, normally taken from the PCI configuration area
0111  *  isr       Function pointer to the ISR
0112  *  arg       Second argument to function isr
0113  */
0114 static inline void pci_interrupt_mask(int irq)
0115 {
0116     (void)rtems_interrupt_vector_disable((rtems_vector_number)irq);
0117 }
0118 
0119 /* Acknowledge the interrupt controller by writing to the interrupt controller.
0120  * Note that since it is a shared interrupt handler service, clearing the
0121  * interrupt source may affect other ISRs registered to this IRQ.
0122  *
0123  * Arguments
0124  *  irq       System IRQ number, normally taken from the PCI configuration area
0125  *  isr       Function pointer to the ISR
0126  *  arg       Second argument to function isr
0127  */
0128 static inline void pci_interrupt_clear(int irq)
0129 {
0130     (void)rtems_interrupt_clear((rtems_vector_number)irq);
0131 }
0132 
0133 #endif /* !__PCI_IRQ_H__ */