include/arch/regdef.h

0001 /*
0002  * Copyright (c) 2005 Jakub Jermar
0003  * All rights reserved.
0004  *
0005  * Redistribution and use in source and binary forms, with or without
0006  * modification, are permitted provided that the following conditions
0007  * are met:
0008  *
0009  * - Redistributions of source code must retain the above copyright
0010  *   notice, this list of conditions and the following disclaimer.
0011  * - Redistributions in binary form must reproduce the above copyright
0012  *   notice, this list of conditions and the following disclaimer in the
0013  *   documentation and/or other materials provided with the distribution.
0014  * - The name of the author may not be used to endorse or promote products
0015  *   derived from this software without specific prior written permission.
0016  *
0017  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
0018  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
0019  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
0020  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
0021  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
0022  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
0023  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
0024  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0025  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
0026  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0027  */
0028
0029 /** @addtogroup RTEMSBSPsSPARC64
0030  * @{
0031  */
0032 /** @file
0033  */
0034
0035 #ifndef KERN_sparc64_REGDEF_H_
0036 #define KERN_sparc64_REGDEF_H_
0037
0038 #define PSTATE_IE_BIT   (1 << 1)
0039 #define PSTATE_AM_BIT   (1 << 3)
0040
0041 #define PSTATE_AG_BIT   (1 << 0)
0042 #define PSTATE_IG_BIT   (1 << 11)
0043 #define PSTATE_MG_BIT   (1 << 10)
0044
0045 #define PSTATE_PRIV_BIT (1 << 2)
0046 #define PSTATE_PEF_BIT  (1 << 4)
0047
0048 #define TSTATE_PSTATE_SHIFT 8
0049 #define TSTATE_PRIV_BIT     (PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT)
0050 #define TSTATE_IE_BIT       (PSTATE_IE_BIT << TSTATE_PSTATE_SHIFT)
0051 #define TSTATE_PEF_BIT      (PSTATE_PEF_BIT << TSTATE_PSTATE_SHIFT)
0052
0053 #define TSTATE_CWP_MASK     0x1f
0054
0055 #define WSTATE_NORMAL(n)    (n)
0056 #define WSTATE_OTHER(n)     ((n) << 3)
0057
0058 /*
0059  * The following definitions concern the UPA_CONFIG register on US and the
0060  * FIREPLANE_CONFIG register on US3.
0061  */
0062 #define ICBUS_CONFIG_MID_SHIFT    17
0063
0064 #endif
0065
0066 /** @}
0067  */