shared/irq/irq-shared.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  *  COPYRIGHT (c) 2012-2015
0005  *  Cobham Gaisler
0006  *
0007  * Redistribution and use in source and binary forms, with or without
0008  * modification, are permitted provided that the following conditions
0009  * are met:
0010  * 1. Redistributions of source code must retain the above copyright
0011  *    notice, this list of conditions and the following disclaimer.
0012  * 2. Redistributions in binary form must reproduce the above copyright
0013  *    notice, this list of conditions and the following disclaimer in the
0014  *    documentation and/or other materials provided with the distribution.
0015  *
0016  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0017  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0018  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0019  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0020  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0021  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0022  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0023  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0024  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0025  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0026  * POSSIBILITY OF SUCH DAMAGE.
0027  *
0028  */
0029
0030 #include <bsp.h>
0031 #include <bsp/irq-generic.h>
0032 #include <rtems/score/processormaskimpl.h>
0033
0034 static inline int bsp_irq_cpu(int irq)
0035 {
0036   return 0;
0037 }
0038
0039 bool bsp_interrupt_is_valid_vector(rtems_vector_number vector)
0040 {
0041   if (vector == 0) {
0042     return false;
0043   }
0044
0045   return vector <= BSP_INTERRUPT_VECTOR_MAX_STD;
0046 }
0047
0048 void bsp_interrupt_facility_initialize(void)
0049 {
0050   /* Nothing to do */
0051 }
0052
0053 static bool is_maskable(rtems_vector_number vector)
0054 {
0055   return vector != 15;
0056 }
0057
0058 rtems_status_code bsp_interrupt_get_attributes(
0059   rtems_vector_number         vector,
0060   rtems_interrupt_attributes *attributes
0061 )
0062 {
0063   attributes->is_maskable = is_maskable(vector);
0064   attributes->can_enable = true;
0065   attributes->maybe_enable = true;
0066   attributes->can_disable = is_maskable(vector);
0067   attributes->maybe_disable = is_maskable(vector);
0068   attributes->can_raise = true;
0069   attributes->can_raise_on = true;
0070   attributes->can_clear = true;
0071   attributes->cleared_by_acknowledge = true;
0072   attributes->can_set_affinity = true;
0073   return RTEMS_SUCCESSFUL;
0074 }
0075
0076 rtems_status_code bsp_interrupt_is_pending(
0077   rtems_vector_number vector,
0078   bool               *pending
0079 )
0080 {
0081   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0082   bsp_interrupt_assert(pending != NULL);
0083   *pending = BSP_Is_interrupt_pending(vector) ||
0084     BSP_Is_interrupt_forced(vector);
0085   return RTEMS_SUCCESSFUL;
0086 }
0087
0088 rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
0089 {
0090   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0091   BSP_Force_interrupt(vector);
0092   return RTEMS_SUCCESSFUL;
0093 }
0094
0095 #if defined(RTEMS_SMP)
0096 rtems_status_code bsp_interrupt_raise_on(
0097   rtems_vector_number vector,
0098   uint32_t            cpu_index
0099 )
0100 {
0101   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0102   BSP_Force_interrupt(vector);
0103   return RTEMS_SUCCESSFUL;
0104 }
0105 #endif
0106
0107 rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
0108 {
0109   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0110   BSP_Clear_forced_interrupt(vector);
0111   BSP_Clear_interrupt(vector);
0112   return RTEMS_SUCCESSFUL;
0113 }
0114
0115 rtems_status_code bsp_interrupt_vector_is_enabled(
0116   rtems_vector_number vector,
0117   bool               *enabled
0118 )
0119 {
0120   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0121   bsp_interrupt_assert(enabled != NULL);
0122   *enabled = !BSP_Cpu_Is_interrupt_masked(vector, bsp_irq_cpu(vector));
0123   return RTEMS_SUCCESSFUL;
0124 }
0125
0126 rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
0127 {
0128   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0129   BSP_Cpu_Unmask_interrupt(vector, 0);
0130   return RTEMS_SUCCESSFUL;
0131 }
0132
0133 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
0134 {
0135   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0136
0137   if (!is_maskable(vector)) {
0138     return RTEMS_UNSATISFIED;
0139   }
0140
0141   BSP_Cpu_Mask_interrupt(vector, 0);
0142   return RTEMS_SUCCESSFUL;
0143 }
0144
0145 rtems_status_code bsp_interrupt_set_priority(
0146   rtems_vector_number vector,
0147   uint32_t priority
0148 )
0149 {
0150   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0151   return RTEMS_UNSATISFIED;
0152 }
0153
0154 rtems_status_code bsp_interrupt_get_priority(
0155   rtems_vector_number vector,
0156   uint32_t *priority
0157 )
0158 {
0159   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0160   bsp_interrupt_assert(priority != NULL);
0161   return RTEMS_UNSATISFIED;
0162 }
0163
0164 #if defined(RTEMS_SMP)
0165 rtems_status_code bsp_interrupt_get_affinity(
0166   rtems_vector_number  vector,
0167   Processor_mask      *affinity
0168 )
0169 {
0170   (void) vector;
0171   _Processor_mask_From_index( affinity, 0 );
0172   return RTEMS_UNSATISFIED;
0173 }
0174
0175 rtems_status_code bsp_interrupt_set_affinity(
0176   rtems_vector_number   vector,
0177   const Processor_mask *affinity
0178 )
0179 {
0180   (void) vector;
0181   (void) affinity;
0182   return RTEMS_UNSATISFIED;
0183 }
0184 #endif