leon3/btimer/watchdog.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*  GPTIMER Watchdog timer routines. On some systems the first GPTIMER
0004  *  core's last Timer instance underflow signal is connected to system
0005  *  reset.
0006  *
0007  *  COPYRIGHT (c) 2012.
0008  *  Cobham Gaisler AB.
0009  *
0010  * Redistribution and use in source and binary forms, with or without
0011  * modification, are permitted provided that the following conditions
0012  * are met:
0013  * 1. Redistributions of source code must retain the above copyright
0014  *    notice, this list of conditions and the following disclaimer.
0015  * 2. Redistributions in binary form must reproduce the above copyright
0016  *    notice, this list of conditions and the following disclaimer in the
0017  *    documentation and/or other materials provided with the distribution.
0018  *
0019  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0020  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0021  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0022  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0023  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0024  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0025  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0026  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0027  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0028  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0029  * POSSIBILITY OF SUCH DAMAGE.
0030  */
0031
0032 #include <bsp.h>
0033 #include <bsp/leon3.h>
0034 #include <bsp/watchdog.h>
0035
0036 struct gptimer_watchdog_priv {
0037   gptimer *regs;
0038   gptimer_timer *timer;
0039   int timerno;
0040 };
0041
0042 struct gptimer_watchdog_priv bsp_watchdogs[1];
0043 int bsp_watchdog_count = 0;
0044
0045 int bsp_watchdog_init(void)
0046 {
0047   int timercnt;
0048
0049   if (!LEON3_Timer_Regs)
0050     return 0;
0051
0052   /* Get Watchdogs in system, this is implemented for one GPTIMER core
0053    * only.
0054    *
0055    * First watchdog is a special case, we can get the first timer core by
0056    * looking at LEON3_Timer_Regs, the watchdog within a timer core is
0057    * always the last timer. Unfortunately we can not know it the watchdog
0058    * functionality is available or not, we assume that it is if we
0059    * reached this function.
0060    */
0061   bsp_watchdogs[0].regs = LEON3_Timer_Regs;
0062
0063   /* Find Timer that has watchdog functionality */
0064   timercnt = grlib_load_32(&bsp_watchdogs[0].regs->config) & 0x7;
0065   if (timercnt < 2) /* First timer system clock timer */
0066     return 0;
0067
0068   bsp_watchdogs[0].timerno = timercnt - 1;
0069   bsp_watchdogs[0].timer = &bsp_watchdogs[0].regs->timer[bsp_watchdogs[0].timerno];
0070
0071   bsp_watchdog_count = 1;
0072   return bsp_watchdog_count;
0073 }
0074
0075 void bsp_watchdog_reload(int watchdog, unsigned int reload_value)
0076 {
0077   gptimer_timer *timer;
0078   uint32_t tctrl;
0079
0080   if (bsp_watchdog_count == 0)
0081     bsp_watchdog_init();
0082
0083   if (bsp_watchdog_count <= watchdog)
0084     return;
0085
0086   /* Kick watchdog, and clear interrupt pending bit */
0087   timer = bsp_watchdogs[watchdog].timer;
0088   grlib_store_32(&timer->trldval, reload_value);
0089   tctrl = grlib_load_32(&timer->tctrl);
0090   tctrl |= GPTIMER_TCTRL_LD | GPTIMER_TCTRL_EN;
0091   tctrl &= ~GPTIMER_TCTRL_IP;
0092   grlib_store_32(&timer->tctrl, tctrl);
0093 }
0094
0095 void bsp_watchdog_stop(int watchdog)
0096 {
0097   if (bsp_watchdog_count == 0)
0098     bsp_watchdog_init();
0099
0100   if (bsp_watchdog_count <= watchdog)
0101     return;
0102
0103   /* Stop watchdog timer */
0104   grlib_store_32(&bsp_watchdogs[watchdog].timer->tctrl, 0);
0105 }
0106
0107 /* Use watchdog timer to reset system */
0108 void bsp_watchdog_system_reset(void)
0109 {
0110   sparc_disable_interrupts();
0111   bsp_watchdog_reload(0, 1);
0112 }