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0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsSPARCShared
0007  *
0008  * @brief This header file provides interfaces of a CPU counter implementation
0009  *   for SPARC BSPs.
0010  */
0011 
0012 /*
0013  * Copyright (C) 2016, 2023 embedded brains GmbH & Co. KG
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036 
0037 #ifndef _BSP_SPARC_COUNTER_H
0038 #define _BSP_SPARC_COUNTER_H
0039 
0040 #include <rtems/score/cpu.h>
0041 
0042 #ifdef __cplusplus
0043 extern "C" {
0044 #endif /* __cplusplus */
0045 
0046 struct timecounter;
0047 
0048 void _SPARC_Counter_at_tick_clock( void );
0049 
0050 CPU_Counter_ticks _SPARC_Counter_read_default( void );
0051 
0052 CPU_Counter_ticks _SPARC_Counter_read_clock_isr_disabled( void );
0053 
0054 CPU_Counter_ticks _SPARC_Counter_read_clock( void );
0055 
0056 uint32_t _SPARC_Get_timecount_clock( struct timecounter * );
0057 
0058 typedef CPU_Counter_ticks ( *SPARC_Counter_read )( void );
0059 
0060 /*
0061  * The SPARC processors supported by RTEMS have no built-in CPU counter
0062  * support.  We have to use some hardware counter module for this purpose, for
0063  * example the GPTIMER instance used by the clock driver.  The BSP must provide
0064  * an implementation of the CPU counter read function.  This allows the use of
0065  * dynamic hardware enumeration.
0066  */
0067 typedef struct {
0068   SPARC_Counter_read                read_isr_disabled;
0069   SPARC_Counter_read                read;
0070   volatile const CPU_Counter_ticks *counter_register;
0071   volatile const uint32_t          *pending_register;
0072   uint32_t                          pending_mask;
0073   CPU_Counter_ticks                 accumulated;
0074   CPU_Counter_ticks                 interval;
0075 } SPARC_Counter;
0076 
0077 extern SPARC_Counter _SPARC_Counter;
0078 
0079 #define SPARC_COUNTER_DEFINITION \
0080   SPARC_Counter _SPARC_Counter = { \
0081     .read_isr_disabled = _SPARC_Counter_read_default, \
0082     .read = _SPARC_Counter_read_default \
0083   }
0084 
0085 #ifdef __cplusplus
0086 }
0087 #endif /* __cplusplus */
0088 
0089 #endif /* _BSP_SPARC_COUNTER_H */