shared/irq/irq-record.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSImplClassicIntr
0007  *
0008  * @brief This source file contains the implementation of the interrupt event
0009  *   recording support.
0010  */
0011
0012 /*
0013  * Copyright (C) 2022 embedded brains GmbH & Co. KG
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036
0037 #include <bsp/irq-generic.h>
0038
0039 #include <rtems/record.h>
0040
0041 /* The regular interrupt entries are registered in this table */
0042 static rtems_interrupt_entry *
0043 _Record_Interrupt_dispatch_table[ BSP_INTERRUPT_DISPATCH_TABLE_SIZE ];
0044
0045 /*
0046  * Provide one interrupt entry for the _Record_Interrupt_handler() interrupt
0047  * dispatch wrapper for each interrupt vector.
0048  */
0049 static rtems_interrupt_entry
0050 _Record_Interrupt_entry_table[ BSP_INTERRUPT_DISPATCH_TABLE_SIZE ];
0051
0052 rtems_interrupt_entry **bsp_interrupt_get_dispatch_table_slot(
0053   rtems_vector_number index
0054 )
0055 {
0056   return &_Record_Interrupt_dispatch_table[ index ];
0057 }
0058
0059 static void _Record_Interrupt_handler( void *arg )
0060 {
0061   uintptr_t              vector;
0062   rtems_interrupt_entry *entry;
0063
0064   vector = (uintptr_t) arg;
0065   rtems_record_produce( RTEMS_RECORD_INTERRUPT_ENTRY, vector );
0066
0067   entry = bsp_interrupt_entry_load_acquire(
0068     &_Record_Interrupt_dispatch_table[ vector ]
0069   );
0070
0071   if ( RTEMS_PREDICT_TRUE( entry != NULL ) ) {
0072     bsp_interrupt_dispatch_entries( entry );
0073   } else {
0074 #if defined(RTEMS_SMP)
0075     bsp_interrupt_spurious( vector );
0076 #else
0077     bsp_interrupt_handler_default( vector );
0078 #endif
0079   }
0080
0081   rtems_record_produce( RTEMS_RECORD_INTERRUPT_EXIT, vector );
0082 }
0083
0084 void _Record_Interrupt_initialize( void )
0085 {
0086   uintptr_t i;
0087
0088   /*
0089    * Let each interrupt dispatch table slot reference the
0090    * _Record_Interrupt_handler() interrupt dispatch wrapper.
0091    */
0092   for ( i = 0; i < BSP_INTERRUPT_DISPATCH_TABLE_SIZE; ++i ) {
0093     _Record_Interrupt_entry_table[ i ].handler = _Record_Interrupt_handler;
0094     _Record_Interrupt_entry_table[ i ].arg = (void *) i;
0095     bsp_interrupt_dispatch_table[ i ] = &_Record_Interrupt_entry_table[ i ];
0096   }
0097 }