dev/rtc/mc146818a_ioreg.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  *  This file contains a typical set of register access routines which may be
0005  *  used with the MC146818A chip if accesses to the chip are as follows:
0006  *
0007  *    + registers are in I/O space
0008  *    + registers are accessed as bytes
0009  *    + registers are only byte-aligned (no address gaps)
0010  */
0011
0012 /*
0013  *  COPYRIGHT (c) 1989-1997.
0014  *  On-Line Applications Research Corporation (OAR).
0015  *
0016  * Redistribution and use in source and binary forms, with or without
0017  * modification, are permitted provided that the following conditions
0018  * are met:
0019  * 1. Redistributions of source code must retain the above copyright
0020  *    notice, this list of conditions and the following disclaimer.
0021  * 2. Redistributions in binary form must reproduce the above copyright
0022  *    notice, this list of conditions and the following disclaimer in the
0023  *    documentation and/or other materials provided with the distribution.
0024  *
0025  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0026  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0027  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0028  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0029  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0030  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0031  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0032  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0033  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0034  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0035  * POSSIBILITY OF SUCH DAMAGE.
0036  */
0037
0038 #include <rtems.h>
0039 #include <bsp.h>
0040 #include <libchip/rtc.h>
0041 #include <libchip/mc146818a.h>
0042
0043 /*
0044  *  At this point, not all CPUs or BSPs have defined in/out port routines.
0045  */
0046 #if defined(__i386__) || defined(__PPC__)
0047 #if defined(inport_byte)
0048 uint32_t mc146818a_get_register(
0049   uintptr_t  ulCtrlPort,
0050   uint8_t    ucRegNum
0051 )
0052 {
0053   uint8_t   val;
0054   uint8_t   tmp;
0055
0056   (void) tmp;                 /* eliminate warning for set but not used */
0057
0058   outport_byte( ulCtrlPort, ucRegNum );
0059   inport_byte( 0x84, tmp );   /* Hack a delay to give chip time to settle */
0060   inport_byte( ulCtrlPort+1, val );
0061   inport_byte( 0x84, tmp );   /* Hack a delay to give chip time to settle */
0062   return val;
0063 }
0064
0065 void  mc146818a_set_register(
0066   uintptr_t  ulCtrlPort,
0067   uint8_t    ucRegNum,
0068   uint32_t   ucData
0069 )
0070 {
0071   outport_byte( ulCtrlPort, ucRegNum );
0072   outport_byte( ulCtrlPort+1, (uint8_t)ucData );
0073 }
0074 #endif
0075 #endif