shsim/start/cpu_asm.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  *  Support for SuperH Simulator in GDB
0005  */
0006
0007 /*
0008  *  COPYRIGHT (c) 1989-2008.
0009  *  On-Line Applications Research Corporation (OAR).
0010  *
0011  * Redistribution and use in source and binary forms, with or without
0012  * modification, are permitted provided that the following conditions
0013  * are met:
0014  * 1. Redistributions of source code must retain the above copyright
0015  *    notice, this list of conditions and the following disclaimer.
0016  * 2. Redistributions in binary form must reproduce the above copyright
0017  *    notice, this list of conditions and the following disclaimer in the
0018  *    documentation and/or other materials provided with the distribution.
0019  *
0020  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0021  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0022  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0023  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0024  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0025  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0026  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0027  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0028  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0029  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0030  * POSSIBILITY OF SUCH DAMAGE.
0031  */
0032
0033 #include <rtems/score/cpu.h>
0034 #include <rtems/score/isr.h>
0035 #include <rtems/score/percpu.h>
0036 #include <rtems/score/threaddispatch.h>
0037 #include <rtems/score/sh.h>
0038
0039 unsigned long  *_old_stack_ptr;
0040
0041 register unsigned long  *stack_ptr __asm__ ("r15");
0042
0043 void __ISR_Handler(uint32_t vector);
0044
0045 /*
0046  *  This routine provides the RTEMS interrupt management.
0047  */
0048 void __ISR_Handler( uint32_t   vector)
0049 {
0050   ISR_Level level;
0051
0052   _ISR_Local_disable( level );
0053
0054   _Thread_Dispatch_disable();
0055
0056   if ( _ISR_Nest_level == 0 )
0057     {
0058       /* Install irq stack */
0059       _old_stack_ptr = stack_ptr;
0060       stack_ptr = _CPU_Interrupt_stack_high;
0061     }
0062
0063   _ISR_Nest_level++;
0064
0065   _ISR_Local_enable( level );
0066
0067   /* call isp */
0068   if ( _ISR_Vector_table[ vector])
0069     (*_ISR_Vector_table[ vector ])( vector );
0070
0071   _ISR_Local_disable( level );
0072
0073   _Thread_Dispatch_unnest( _Per_CPU_Get() );
0074
0075   _ISR_Nest_level--;
0076
0077   if ( _ISR_Nest_level == 0 )
0078     /* restore old stack pointer */
0079     stack_ptr = _old_stack_ptr;
0080
0081   _ISR_Local_enable( level );
0082
0083   if ( _ISR_Nest_level )
0084     return;
0085
0086   if ( !_Thread_Dispatch_is_enabled() ) {
0087     return;
0088   }
0089
0090   if ( _Thread_Dispatch_necessary ) {
0091     _Thread_Dispatch();
0092   }
0093 }