gensh4/include/tm27.h

0001 /*
0002  * @file
0003  * @ingroup sh_gensh4
0004  * @brief Implementations for interrupt mechanisms for Time Test 27
0005  */
0006
0007 /*
0008  *  The license and distribution terms for this file may be
0009  *  found in the file LICENSE in this distribution or at
0010  *  http://www.rtems.org/license/LICENSE.
0011  */
0012
0013 #ifndef _RTEMS_TMTEST27
0014 #error "This is an RTEMS internal file you must not include directly."
0015 #endif
0016
0017 #ifndef __tm27_h
0018 #define __tm27_h
0019
0020 /*
0021  *  Stuff for Time Test 27
0022  */
0023
0024 #define MUST_WAIT_FOR_INTERRUPT 1
0025
0026 #ifndef SH7750_EVT_WDT_ITI
0027 #   error "..."
0028 #endif
0029
0030 #define TM27_USE_VECTOR_HANDLER
0031
0032 #define Install_tm27_vector( handler ) \
0033 { \
0034     rtems_isr_entry old_handler; \
0035     rtems_status_code status; \
0036     status = rtems_interrupt_catch( (handler), \
0037             SH7750_EVT_TO_NUM(SH7750_EVT_WDT_ITI), &old_handler); \
0038     if (status != RTEMS_SUCCESSFUL) \
0039         printf("Status of rtems_interrupt_catch = %d", status); \
0040 }
0041
0042 #define Cause_tm27_intr() \
0043 { \
0044     *(volatile uint16_t*)SH7750_IPRB |= 0xf000; \
0045     *(volatile uint16_t*)SH7750_WTCSR = SH7750_WTCSR_KEY; \
0046     *(volatile uint16_t*)SH7750_WTCNT = SH7750_WTCNT_KEY | 0xfe; \
0047     *(volatile uint16_t*)SH7750_WTCSR = \
0048                             SH7750_WTCSR_KEY | SH7750_WTCSR_TME; \
0049 }
0050
0051 #define Clear_tm27_intr() \
0052 { \
0053     *(volatile uint16_t*)SH7750_WTCSR = SH7750_WTCSR_KEY; \
0054 }
0055
0056 #define Lower_tm27_intr() \
0057 { \
0058     sh_set_interrupt_level((SH7750_IPRB & 0xf000) << SH4_SR_IMASK_S); \
0059 }
0060
0061 #endif