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File indexing completed on 2025-05-11 08:24:01 

0001 /*
0002  * This file contains the isp frames for the user interrupts.
0003  * From these procedures __ISR_Handler is called with the vector number
0004  * as argument.
0005  *
0006  * __ISR_Handler is kept in a separate file (cpu_asm.c), because a bug in
0007  * some releases of gcc doesn't properly handle #pragma interrupt, if a
0008  * file contains both isrs and normal functions.
0009  *
0010  *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
0011  *           Bernd Becker (becker@faw.uni-ulm.de)
0012  *
0013  *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
0014  *
0015  *  This program is distributed in the hope that it will be useful,
0016  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
0017  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE
0018  *
0019  *
0020  *  COPYRIGHT (c) 1998.
0021  *  On-Line Applications Research Corporation (OAR).
0022  *
0023  *  The license and distribution terms for this file may be
0024  *  found in the file LICENSE in this distribution or at
0025  *  http://www.rtems.org/license/LICENSE.
0026  *
0027  *  Modified to reflect isp entries for sh7045 processor:
0028  *  John M. Mills (jmills@tga.com)
0029  *  TGA Technologies, Inc.
0030  *      100 Pinnacle Way, Suite 140
0031  *  Norcross, GA 30071 U.S.A.
0032  *  August, 1999
0033  *
0034  *  This modified file may be copied and distributed in accordance
0035  *  the above-referenced license. It is provided for critique and
0036  *  developmental purposes without any warranty nor representation
0037  *  by the authors or by TGA Technologies.
0038  */
0039 
0040 #include <rtems/score/cpu.h>
0041 
0042 /*
0043  * This is a exception vector table
0044  *
0045  * It has the same structure as the actual vector table (vectab)
0046  */
0047 
0048 
0049 /* SH-2 ISR Table */
0050 #include <rtems/score/ispsh7045.h>
0051 
0052 CPU_ISR_raw_handler _Hardware_isr_Table[256]={
0053 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,     /* PWRon Reset, Maual Reset,...*/
0054 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0055 _dummy_isp, _dummy_isp, _dummy_isp,
0056 _nmi_isp, _usb_isp,                               /* irq 11, 12*/
0057 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0058 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0059 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0060 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0061 _dummy_isp, _dummy_isp, _dummy_isp,
0062 /* trapa 0 -31 */
0063 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0064 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0065 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0066 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0067 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0068 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0069 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0070 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0071 _irq0_isp, _irq1_isp, _irq2_isp, _irq3_isp,   /* external H/W: irq 64-71 */
0072 _irq4_isp, _irq5_isp, _irq6_isp, _irq7_isp,
0073 _dma0_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* DMAC: irq 72-87*/
0074 _dma1_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0075 _dma2_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0076 _dma3_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0077 _mtua0_isp, _mtub0_isp, _mtuc0_isp, _mtud0_isp, /* MTUs: irq 88-127 */
0078 _mtuv0_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0079 _mtua1_isp, _mtub1_isp, _dummy_isp, _dummy_isp,
0080 _mtuv1_isp, _mtuu1_isp, _dummy_isp, _dummy_isp,
0081 _mtua2_isp, _mtub2_isp, _dummy_isp, _dummy_isp,
0082 _mtuv2_isp, _mtuu2_isp, _dummy_isp, _dummy_isp,
0083 _mtua3_isp, _mtub3_isp, _mtuc3_isp, _mtud3_isp,
0084 _mtuv3_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0085 _mtua4_isp, _mtub4_isp, _mtuc4_isp, _mtud4_isp,
0086 _mtuv4_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0087 _eri0_isp, _rxi0_isp, _txi0_isp, _tei0_isp, /* SCI0-1: irq 128-135*/
0088 _eri1_isp, _rxi1_isp, _txi1_isp, _tei1_isp,
0089 _adi0_isp, _adi1_isp, _dummy_isp, _dummy_isp, /* ADC0-1: irq 136-139*/
0090 _dtci_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* DTU: irq 140-143 */
0091 _cmt0_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* CMT0-1: irq 144-151 */
0092 _cmt1_isp, _dummy_isp, _dummy_isp, _dummy_isp,
0093 _wdt_isp, /* WDT: irq 152*/
0094 _bsc_isp, _dummy_isp, _dummy_isp, /* BSC: irq 153-155*/
0095 _oei_isp, /* I/O Port: irq 156*/
0096 };
0097 
0098 #define Str(a)#a
0099 
0100 /*
0101  * Some versions of gcc and all version of egcs at least until egcs-1.1b
0102  * are not able to handle #pragma interrupt correctly if more than 1 isr is
0103  * contained in a file and when optimizing.
0104  * We try to work around this problem by using the macro below.
0105  */
0106 #define isp( name, number, func)\
0107 __asm__ (".global _"Str(name)"\n\t"\
0108      "_"Str(name)":       \n\t"\
0109      "    mov.l r0,@-r15   \n\t"\
0110      "    mov.l r1,@-r15   \n\t"\
0111      "    mov.l r2,@-r15   \n\t"\
0112      "    mov.l r3,@-r15   \n\t"\
0113      "    mov.l r4,@-r15   \n\t"\
0114      "    mov.l r5,@-r15   \n\t"\
0115      "    mov.l r6,@-r15   \n\t"\
0116      "    mov.l r7,@-r15   \n\t"\
0117      "    mov.l r14,@-r15  \n\t"\
0118      "    sts.l pr,@-r15   \n\t"\
0119      "    sts.l mach,@-r15 \n\t"\
0120      "    sts.l macl,@-r15 \n\t"\
0121      "    mov r15,r14      \n\t"\
0122      "    mov.l "Str(name)"_v, r2 \n\t"\
0123      "    mov.l "Str(name)"_k, r1\n\t"\
0124      "    jsr @r1           \n\t"\
0125      "    mov   r2,r4      \n\t"\
0126      "    mov   r14,r15    \n\t"\
0127      "    lds.l @r15+,macl \n\t"\
0128      "    lds.l @r15+,mach \n\t"\
0129      "    lds.l @r15+,pr   \n\t"\
0130      "    mov.l @r15+,r14  \n\t"\
0131      "    mov.l @r15+,r7   \n\t"\
0132      "    mov.l @r15+,r6   \n\t"\
0133      "    mov.l @r15+,r5   \n\t"\
0134      "    mov.l @r15+,r4   \n\t"\
0135      "    mov.l @r15+,r3   \n\t"\
0136      "    mov.l @r15+,r2   \n\t"\
0137      "    mov.l @r15+,r1   \n\t"\
0138      "    mov.l @r15+,r0   \n\t"\
0139      "    rte              \n\t"\
0140      "    nop              \n\t"\
0141      "    .align 2         \n\t"\
0142      #name"_k: \n\t"\
0143      ".long "Str(func)"\n\t"\
0144      #name"_v: \n\t"\
0145      ".long "Str(number));
0146 
0147 /************************************************
0148  * Dummy interrupt service procedure for
0149  * interrupts being not allowed --> Trap 34
0150  ************************************************/
0151 __asm__ (" .section .text\n\
0152 .global __dummy_isp\n\
0153 __dummy_isp:\n\
0154       mov.l r14,@-r15\n\
0155       mov   r15, r14\n\
0156       trapa #34\n\
0157       mov.l @r15+,r14\n\
0158       rte\n\
0159       nop");
0160 
0161 /*******************************************************************
0162  *     ISP Vector Table for sh7045 family of processors            *
0163  *******************************************************************/
0164 
0165 
0166 /*****************************
0167  * Non maskable interrupt
0168  *****************************/
0169 isp( _nmi_isp, NMI_ISP_V, ___ISR_Handler);
0170 
0171 /*****************************
0172  * User break controller
0173  *****************************/
0174 isp( _usb_isp, USB_ISP_V, ___ISR_Handler);
0175 
0176 /*****************************
0177  *  External interrupts 0-7
0178  *****************************/
0179 isp( _irq0_isp, IRQ0_ISP_V, ___ISR_Handler);
0180 isp( _irq1_isp, IRQ1_ISP_V, ___ISR_Handler);
0181 isp( _irq2_isp, IRQ2_ISP_V, ___ISR_Handler);
0182 isp( _irq3_isp, IRQ3_ISP_V, ___ISR_Handler);
0183 isp( _irq4_isp, IRQ4_ISP_V, ___ISR_Handler);
0184 isp( _irq5_isp, IRQ5_ISP_V, ___ISR_Handler);
0185 isp( _irq6_isp, IRQ6_ISP_V, ___ISR_Handler);
0186 isp( _irq7_isp, IRQ7_ISP_V, ___ISR_Handler);
0187 
0188 /*****************************
0189  * DMA - controller
0190  *****************************/
0191 isp( _dma0_isp, DMA0_ISP_V, ___ISR_Handler);
0192 isp( _dma1_isp, DMA1_ISP_V, ___ISR_Handler);
0193 isp( _dma2_isp, DMA2_ISP_V, ___ISR_Handler);
0194 isp( _dma3_isp, DMA3_ISP_V, ___ISR_Handler);
0195 
0196 
0197 /*****************************
0198  * Match timer unit
0199  *****************************/
0200 
0201 /*****************************
0202  * Timer 0
0203  *****************************/
0204 isp( _mtua0_isp, MTUA0_ISP_V, ___ISR_Handler);
0205 isp( _mtub0_isp, MTUB0_ISP_V, ___ISR_Handler);
0206 isp( _mtuc0_isp, MTUC0_ISP_V, ___ISR_Handler);
0207 isp( _mtud0_isp, MTUD0_ISP_V, ___ISR_Handler);
0208 isp( _mtuv0_isp, MTUV0_ISP_V, ___ISR_Handler);
0209 
0210 /*****************************
0211  * Timer 1
0212  *****************************/
0213 isp( _mtua1_isp, MTUA1_ISP_V, ___ISR_Handler);
0214 isp( _mtub1_isp, MTUB1_ISP_V, ___ISR_Handler);
0215 isp( _mtuv1_isp, MTUV1_ISP_V, ___ISR_Handler);
0216 isp( _mtuu1_isp, MTUU1_ISP_V, ___ISR_Handler);
0217 
0218 /*****************************
0219  * Timer 2
0220  *****************************/
0221 isp( _mtua2_isp, MTUA2_ISP_V, ___ISR_Handler);
0222 isp( _mtub2_isp, MTUB2_ISP_V, ___ISR_Handler);
0223 isp( _mtuv2_isp, MTUV2_ISP_V, ___ISR_Handler);
0224 isp( _mtuu2_isp, MTUU2_ISP_V, ___ISR_Handler);
0225 
0226 /*****************************
0227  * Timer 3
0228  *****************************/
0229 isp( _mtua3_isp, MTUA3_ISP_V, ___ISR_Handler);
0230 isp( _mtub3_isp, MTUB3_ISP_V, ___ISR_Handler);
0231 isp( _mtuc3_isp, MTUC3_ISP_V, ___ISR_Handler);
0232 isp( _mtud3_isp, MTUD3_ISP_V, ___ISR_Handler);
0233 isp( _mtuv3_isp, MTUV3_ISP_V, ___ISR_Handler);
0234 
0235 /*****************************
0236  * Timer 4
0237  *****************************/
0238 isp( _mtua4_isp, MTUA4_ISP_V, ___ISR_Handler);
0239 isp( _mtub4_isp, MTUB4_ISP_V, ___ISR_Handler);
0240 isp( _mtuc4_isp, MTUC4_ISP_V, ___ISR_Handler);
0241 isp( _mtud4_isp, MTUD4_ISP_V, ___ISR_Handler);
0242 isp( _mtuv4_isp, MTUV4_ISP_V, ___ISR_Handler);
0243 
0244 
0245 /*****************************
0246  * Serial interfaces
0247  *****************************/
0248 
0249 /*****************************
0250  * Serial interface 0
0251  *****************************/
0252 isp( _eri0_isp,  ERI0_ISP_V, ___ISR_Handler);
0253 isp( _rxi0_isp,  RXI0_ISP_V, ___ISR_Handler);
0254 isp( _txi0_isp,  TXI0_ISP_V, ___ISR_Handler);
0255 isp( _tei0_isp,  TEI0_ISP_V, ___ISR_Handler);
0256 
0257 /*****************************
0258  * Serial interface 1
0259  *****************************/
0260 isp( _eri1_isp,  ERI1_ISP_V, ___ISR_Handler);
0261 isp( _rxi1_isp,  RXI1_ISP_V, ___ISR_Handler);
0262 isp( _txi1_isp,  TXI1_ISP_V, ___ISR_Handler);
0263 isp( _tei1_isp,  TEI1_ISP_V, ___ISR_Handler);
0264 
0265 
0266 /******************************
0267  * A/D converters
0268  * ADC0-1
0269  ******************************/
0270 isp( _adi0_isp,  ADI0_ISP_V, ___ISR_Handler);
0271 isp( _adi1_isp,  ADI1_ISP_V, ___ISR_Handler);
0272 
0273 
0274 /******************************
0275  *  Data transfer controller
0276  ******************************/
0277 isp( _dtci_isp,  DTC_ISP_V, ___ISR_Handler);
0278 
0279 
0280 /******************************
0281  *  Counter match timer
0282  ******************************/
0283 isp( _cmt0_isp,  CMT0_ISP_V, ___ISR_Handler);
0284 isp( _cmt1_isp,  CMT1_ISP_V, ___ISR_Handler);
0285 
0286 
0287 /******************************
0288  *  Watchdog timer
0289  ******************************/
0290 isp( _wdt_isp,  WDT_ISP_V, ___ISR_Handler);
0291 
0292 
0293 /******************************
0294  * DRAM refresh control unit
0295  * of bus state controller
0296  ******************************/
0297 isp( _bsc_isp,  CMI_ISP_V, ___ISR_Handler);
0298 
0299 /******************************
0300  *  I/O port
0301  ******************************/
0302 isp( _oei_isp,  OEI_ISP_V, ___ISR_Handler);
0303 
0304 
0305 /*****************************
0306  * Parity control unit of
0307  * the bus state controller
0308  * NOT PROVIDED IN SH-2
0309  *****************************/
0310 /* isp( _prt_isp,  PRT_ISP_V, ___ISR_Handler); */
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