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File indexing completed on 2025-05-11 08:24:01
0001 /* 0002 * hw_init.c: set up sh7045F internal subunits 0003 * Pin and memory assignments assume 0004 * target is Hitachi SH7045F EVB ("lcevb") 0005 * 0006 * Provides two initialization routines: 0007 * A. 'void early_hw_init(void)' for 'start.S' 0008 * sets up hw needed for early RTEMS boot, and 0009 * B. 'void bsp_hw_init(void)' for 'bspstart.c' 0010 * sets up hardware used by this BSP. 0011 * 0012 * Author: John M. Mills (jmills@tga.com) 0013 * COPYRIGHT(c) 2000, TGA Technologies, Inc 0014 * Norcross, GA 30071 U.S.A 0015 * 0016 * This program is distributed in the hope that it will be useful, 0017 * but WITHOUT ANY WARRANTY; without even the implied warranty of 0018 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 0019 * 0020 * 0021 * The license and distribution terms for this file may be 0022 * found in the file LICENSE in this distribution or at 0023 * http://www.rtems.org/license/LICENSE. 0024 * 0025 * Adapted from Hitachi EVB7045F tutorial files by: 0026 * John M. Mills (jmills@tga.com) 0027 * TGA Technologies, Inc. 0028 * 100 Pinnacle Way, Suite 140 0029 * Norcross, GA 30071 U.S.A. 0030 * 0031 * 0032 * This file may be copied and distributed in accordance 0033 * the above-referenced license. It is provided for critique and 0034 * developmental purposes without any warranty nor representation 0035 * by the authors or by TGA Technologies. 0036 */ 0037 0038 #include <bsp.h> 0039 0040 #include <stdlib.h> 0041 0042 #include <rtems/libio.h> 0043 #include <rtems/score/sh_io.h> 0044 #include <rtems/score/iosh7045.h> 0045 0046 /* exported entries */ 0047 extern void bsp_hw_init (void); 0048 extern void early_hw_init (void); 0049 0050 /* called from 'start.S' on "#ifdef START_HW_INIT" */ 0051 void early_hw_init (void) 0052 { 0053 #ifdef STANDALONE_EVB 0054 /* STANDALONE_EVB minimally sets up bus and DRAM here */ 0055 /* no STANDALONE_EVB accepts defaults from debug monitor */ 0056 0057 /* FIXME: replace 'magic numbers' with logical names */ 0058 0059 write16(0x2020, BSC_BCR1); /* Bus width access - 32-bit on CS1 */ 0060 write16(0xF3DD, BSC_BCR2); /* Idle cycles CS3-CS0 - 0 idle cycles*/ 0061 write16(0xFF3F, BSC_WCR1); /* Waits for CS3-CS0 - 3 waits on CS1 */ 0062 write16(0x000F, BSC_WCR2); /* Waits for DRAM/DMA access - default */ 0063 write16(0x0000, BSC_DCR); /* DRAM control - default */ 0064 write16(0x0000, BSC_RTCSR); /* DRAM refresh - default */ 0065 write16(0x0000, BSC_RTCNT); /* DRAM refresh counter - default*/ 0066 write16(0x0000, BSC_RTCOR); /* DRAM refresh compare match - default */ 0067 #endif 0068 0069 /* add early-init functions here */ 0070 0071 }; 0072 0073 /* to be called from 'bspstart.c' */ 0074 void bsp_hw_init (void) 0075 { 0076 uint16_t temp16; 0077 0078 #ifdef STANDALONE_EVB 0079 /* STANDALONE_EVB: sets up PFC */ 0080 /* no STANDALONE_EVB: accepts defaults, adds RESET */ 0081 0082 /* FIXME: replace 'magic numbers' */ 0083 0084 write16(0x5000, PFC_PACRH); /* Pin function controller - WRHH, WRHL */ 0085 write16(0x1550, PFC_PACRL1); /* Pin fun. controller - WRH,WRL,RD,CS1 */ 0086 write16(0x0000, PFC_PBCR1); /* Pin function controller - default */ 0087 write16(0x2005, PFC_PBCR2); /* Pin fcn. controller - A18,A17,A16 */ 0088 write16(0xFFFF, PFC_PCCR); /* Pin function controller - A15-A0 */ 0089 write16(0x5555, PFC_PDCRH1); /* Pin function controller - D31-D24 */ 0090 write16(0x5555, PFC_PDCRH2); /* Pin function controller - D23-D16 */ 0091 write16(0xFFFF, PFC_PDCRL); /* Pin function controller - D15-D0 */ 0092 write16(0x0000, PFC_IFCR); /* Pin function controller - default */ 0093 write16(0x0000, PFC_PACRL2); /* default disconnects all I/O pins;*/ 0094 /* [re-connected by DEVICE_open()] */ 0095 #endif 0096 0097 /* default hardware setup for SH7045F EVB */ 0098 0099 /* PFC: General I/O except pin 13 (reset): */ 0100 temp16 = read16(PFC_PECR1); 0101 temp16 |= 0x0800; 0102 write16(temp16, PFC_PECR1); 0103 0104 /* All I/O lines bits 7-0: */ 0105 write16(0x00, PFC_PECR2); 0106 0107 /* P5 (LED) out, all other pins in: */ 0108 temp16 = read16(PFC_PEIOR); 0109 temp16 |= 0x0020; 0110 write16(temp16, PFC_PEIOR); 0111 0112 }
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