gensh1/start/cpu_asm.c

0001 /*
0002  *  This file contains the basic algorithms for all assembly code used
0003  *  in an specific CPU port of RTEMS.  These algorithms must be implemented
0004  *  in assembly language
0005  *
0006  *  NOTE:  This port uses a C file with inline assembler instructions
0007  *
0008  *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
0009  *           Bernd Becker (becker@faw.uni-ulm.de)
0010  *
0011  *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
0012  *
0013  *  This program is distributed in the hope that it will be useful,
0014  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
0015  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
0016  *
0017  *
0018  *  COPYRIGHT (c) 1998.
0019  *  On-Line Applications Research Corporation (OAR).
0020  *
0021  *  The license and distribution terms for this file may be
0022  *  found in the file LICENSE in this distribution or at
0023  *  http://www.rtems.org/license/LICENSE.
0024  *
0025  */
0026
0027 /*
0028  *  This is supposed to be an assembly file.  This means that system.h
0029  *  and cpu.h should not be included in a "real" cpu_asm file.  An
0030  *  implementation in assembly should include "cpu_asm.h"
0031  */
0032
0033 #include <rtems/score/percpu.h>
0034 #include <rtems/score/isr.h>
0035 #include <rtems/score/threaddispatch.h>
0036 #include <rtems/score/sh.h>
0037 #include <rtems/score/ispsh7032.h>
0038
0039 #include <rtems/score/ispsh7032.h>
0040 #include <rtems/score/iosh7032.h>
0041 #include <rtems/score/sh_io.h>
0042
0043 unsigned long *_old_stack_ptr;
0044
0045 register unsigned long  *stack_ptr __asm__ ("r15");
0046
0047 /*
0048  * sh_set_irq_priority
0049  *
0050  * this function sets the interrupt level of the specified interrupt
0051  *
0052  * parameters:
0053  *             - irq : interrupt number
0054  *             - prio: priority to set for this interrupt number
0055  *
0056  * returns:    0 if ok
0057  *             -1 on error
0058  */
0059
0060 unsigned int sh_set_irq_priority(
0061   unsigned int irq,
0062   unsigned int prio )
0063 {
0064   uint32_t         shiftcount;
0065   uint32_t         prioreg;
0066   uint16_t         temp16;
0067   ISR_Level        level;
0068
0069   /*
0070    * first check for valid interrupt
0071    */
0072   if (( irq > 113) || (_Hardware_isr_Table[irq] == _dummy_isp))
0073     return -1;
0074   /*
0075    * check for valid irq priority
0076    */
0077   if ( prio > 15 )
0078     return -1;
0079
0080   /*
0081    * look up appropriate interrupt priority register
0082    */
0083   if ( irq > 71)
0084     {
0085       irq = irq - 72;
0086       shiftcount = 12 - ((irq & ~0x03) % 16);
0087
0088       switch( irq / 16)
0089     {
0090     case 0: { prioreg = INTC_IPRC; break;}
0091     case 1: { prioreg = INTC_IPRD; break;}
0092     case 2: { prioreg = INTC_IPRE; break;}
0093     default: return -1;
0094     }
0095     }
0096   else
0097     {
0098       shiftcount = 12 - 4 * ( irq % 4);
0099       if ( irq > 67)
0100     prioreg = INTC_IPRB;
0101       else
0102     prioreg = INTC_IPRA;
0103     }
0104
0105   /*
0106    * Set the interrupt priority register
0107    */
0108   _ISR_Local_disable( level );
0109
0110     temp16 = read16( prioreg);
0111     temp16 &= ~( 15 << shiftcount);
0112     temp16 |= prio << shiftcount;
0113     write16( temp16, prioreg);
0114
0115   _ISR_Local_enable( level );
0116
0117   return 0;
0118 }
0119
0120 /*
0121  *  This routine provides the RTEMS interrupt management.
0122  */
0123
0124 void __ISR_Handler( uint32_t   vector)
0125 {
0126   ISR_Level level;
0127
0128   _ISR_Local_disable( level );
0129
0130   _Thread_Dispatch_disable();
0131
0132   if ( _ISR_Nest_level == 0 )
0133     {
0134       /* Install irq stack */
0135       _old_stack_ptr = stack_ptr;
0136       stack_ptr = _CPU_Interrupt_stack_high;
0137     }
0138
0139   _ISR_Nest_level++;
0140
0141   _ISR_Local_enable( level );
0142
0143   /* call isp */
0144   if ( _ISR_Vector_table[ vector])
0145     (*_ISR_Vector_table[ vector ])( vector );
0146
0147   _ISR_Local_disable( level );
0148
0149   _Thread_Dispatch_unnest( _Per_CPU_Get() );
0150
0151   _ISR_Nest_level--;
0152
0153   if ( _ISR_Nest_level == 0 )
0154     /* restore old stack pointer */
0155     stack_ptr = _old_stack_ptr;
0156
0157   _ISR_Local_enable( level );
0158
0159   if ( _ISR_Nest_level )
0160     return;
0161
0162   if ( !_Thread_Dispatch_is_enabled() ) {
0163     return;
0164   }
0165
0166   if ( _Thread_Dispatch_necessary ) {
0167     _Thread_Dispatch();
0168   }
0169 }