niosv/include/alt_cache.h

0001 /*
0002  * SPDX-License-Identifier: BSD-2-Clause
0003  *
0004  * Copyright (C) 2024 Kevin Kirspel
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027
0028 /******************************************************************************
0029 *                                                                             *
0030 * License Agreement                                                           *
0031 *                                                                             *
0032 * Copyright (c) 2003, 2007 Altera Corporation, San Jose, California, USA.     *
0033 * All rights reserved.                                                        *
0034 *                                                                             *
0035 * Permission is hereby granted, free of charge, to any person obtaining a     *
0036 * copy of this software and associated documentation files (the "Software"),  *
0037 * to deal in the Software without restriction, including without limitation   *
0038 * the rights to use, copy, modify, merge, publish, distribute, sublicense,    *
0039 * and/or sell copies of the Software, and to permit persons to whom the       *
0040 * Software is furnished to do so, subject to the following conditions:        *
0041 *                                                                             *
0042 * The above copyright notice and this permission notice shall be included in  *
0043 * all copies or substantial portions of the Software.                         *
0044 *                                                                             *
0045 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
0046 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
0047 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
0048 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
0049 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
0050 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
0051 * DEALINGS IN THE SOFTWARE.                                                   *
0052 *                                                                             *
0053 * This agreement shall be governed in all respects by the laws of the State   *
0054 * of California and by the laws of the United States of America.              *
0055 *                                                                             *
0056 ******************************************************************************/
0057
0058 #ifndef __ALT_CACHE_H__
0059 #define __ALT_CACHE_H__
0060
0061 /*
0062  * Cache maintenance macros
0063  * CLEAN - Writeback to memory;
0064  * FLUSH - Writeback to memory and invalidate.
0065  */
0066
0067 #if ALT_CPU_DCACHE_SIZE > 0
0068 #define DCACHE_CLEAN_BY_INDEX_VAL(i) \
0069 __asm__ volatile(".insn i 0x0F, 0x2, zero, %[i_reg], 0x081" :: [i_reg] "r"(i));
0070
0071 #define DCACHE_FLUSH_BY_INDEX_VAL(i) \
0072 __asm__ volatile(".insn i 0x0F, 0x2, zero, %[i_reg], 0x082" :: [i_reg] "r"(i));
0073
0074 #define DCACHE_INVALIDATE_BY_INDEX_VAL(i) \
0075 __asm__ volatile(".insn i 0x0F, 0x2, zero, %[i_reg], 0x080" :: [i_reg] "r"(i));
0076
0077 #define ALT_FLUSH_DATA(i) \
0078 __asm__ volatile(".option arch, +zicbom\n" "cbo.flush 0(%[addr])" :: [addr] "r"(i))
0079
0080 #define ALT_INVALIDATE_DATA(i) \
0081 __asm__ volatile(".option arch, +zicbom\n" "cbo.inval 0(%[addr])" :: [addr] "r"(i))
0082 #endif
0083
0084 /*
0085  * alt_cache.h defines the processor specific functions for manipulating the
0086  * cache.
0087  */
0088
0089 #ifdef __cplusplus
0090 extern "C"
0091 {
0092 #endif /* __cplusplus */
0093
0094 /*
0095  * alt_icache_flush() is called to flush the instruction cache for a memory
0096  * region of length "len" bytes, starting at address "start".
0097  */
0098
0099 static inline void alt_icache_flush (const void* start, uint32_t len)
0100 {
0101 #if ALT_CPU_ICACHE_SIZE > 0
0102   __asm__ volatile(".option arch, +zifencei\n" "fence.i" ::: "memory");
0103 #endif
0104 }
0105
0106 /*
0107  * alt_dcache_flush() is called to flush the data cache for a memory
0108  * region of length "len" bytes, starting at address "start".
0109  * Any dirty lines in the data cache are written back to memory.
0110  */
0111
0112 static inline void alt_dcache_flush (const void* start, uint32_t len)
0113 {
0114 #if ALT_CPU_DCACHE_SIZE > 0
0115   const char* i;
0116   const char* end = ((char*)start) + len;
0117
0118   for (i = start; i < end; i+= ALT_CPU_DCACHE_LINE_SIZE) {
0119     ALT_FLUSH_DATA(i);
0120   }
0121
0122   /*
0123   * For an unaligned flush request, we've got one more line left.
0124   * Note that this is dependent on ALT_CPU_DCACHE_LINE_SIZE to be a
0125   * multiple of 2 (which it always is).
0126   */
0127   if (((uint32_t)start) & (ALT_CPU_DCACHE_LINE_SIZE - 1)) {
0128     ALT_FLUSH_DATA(i);
0129   }
0130 #endif
0131 }
0132
0133 /*
0134  * alt_dcache_flush() is called to flush the data cache for a memory
0135  * region of length "len" bytes, starting at address "start".
0136  * Any dirty lines in the data cache are NOT written back to memory.
0137  */
0138
0139 static inline void alt_dcache_flush_no_writeback (
0140   const void* start,
0141   uint32_t len
0142 )
0143 {
0144 #if ALT_CPU_DCACHE_SIZE > 0
0145   const char* i;
0146   const char* end = ((char*)start) + len;
0147
0148   for (i = start; i < end; i+= ALT_CPU_DCACHE_LINE_SIZE) {
0149     ALT_INVALIDATE_DATA(i);
0150   }
0151
0152   /*
0153   * For an unaligned invalidate request, we've got one more line left.
0154   * Note that this is dependent on ALT_CPU_DCACHE_LINE_SIZE to be a
0155   * multiple of 2 (which it always is).
0156   */
0157   if (((uint32_t)start) & (ALT_CPU_DCACHE_LINE_SIZE - 1)) {
0158     ALT_INVALIDATE_DATA(i);
0159   }
0160 #endif
0161 }
0162
0163 /*
0164  * Flush the entire instruction cache.
0165  */
0166
0167 static inline void alt_icache_flush_all (void)
0168 {
0169 #if ALT_CPU_ICACHE_SIZE > 0
0170   __asm__ volatile(".option arch, +zifencei\n" "fence.i" ::: "memory");
0171 #endif
0172 }
0173
0174 /*
0175  * Flush the entire data cache.
0176  */
0177
0178 static inline void alt_dcache_flush_all (void)
0179 {
0180 #if ALT_CPU_DCACHE_SIZE > 0
0181   char* i;
0182   for (
0183     i = (char*)0;
0184     i < (char*) ALT_CPU_DCACHE_SIZE;
0185     i+= ALT_CPU_DCACHE_LINE_SIZE
0186   ) {
0187     DCACHE_CLEAN_BY_INDEX_VAL(i);
0188   }
0189 #endif
0190 }
0191
0192 #ifdef __cplusplus
0193 }
0194 #endif
0195
0196 #endif /* __ALT_CACHE_H__ */