niosv/cache/alt_cache.c

0001 /*
0002  * SPDX-License-Identifier: BSD-2-Clause
0003  *
0004  * Copyright (C) 2024 Kevin Kirspel
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027
0028 #include <stdint.h>
0029 #include <stddef.h>
0030 #include <bsp_system.h>
0031 #include <alt_cache.h>
0032
0033 #define CPU_DATA_CACHE_ALIGNMENT ALT_CPU_DCACHE_LINE_SIZE
0034
0035 #define CPU_INSTRUCTION_CACHE_ALIGNMENT ALT_CPU_ICACHE_LINE_SIZE
0036
0037 #define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
0038
0039 #define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS
0040
0041 static inline void _CPU_cache_flush_1_data_line(const void *d_addr)
0042 {
0043   alt_dcache_flush(d_addr, ALT_CPU_DCACHE_LINE_SIZE);
0044 }
0045
0046 static inline void
0047 _CPU_cache_flush_data_range(
0048   const void *d_addr,
0049   size_t      n_bytes
0050 )
0051 {
0052   alt_dcache_flush(d_addr, n_bytes);
0053 }
0054
0055 static inline void _CPU_cache_invalidate_1_data_line(const void *d_addr)
0056 {
0057   alt_dcache_flush_no_writeback(d_addr, ALT_CPU_DCACHE_LINE_SIZE);
0058 }
0059
0060 static inline void
0061 _CPU_cache_invalidate_data_range(
0062   const void *d_addr,
0063   size_t     n_bytes
0064 )
0065 {
0066   alt_dcache_flush_no_writeback(d_addr, n_bytes);
0067 }
0068
0069 static inline void _CPU_cache_freeze_data(void)
0070 {
0071   /* TODO */
0072 }
0073
0074 static inline void _CPU_cache_unfreeze_data(void)
0075 {
0076   /* TODO */
0077 }
0078
0079 static inline void _CPU_cache_invalidate_1_instruction_line(const void *i_addr)
0080 {
0081   alt_icache_flush(i_addr, ALT_CPU_ICACHE_LINE_SIZE);
0082 }
0083
0084 static inline void
0085 _CPU_cache_invalidate_instruction_range( const void *i_addr, size_t n_bytes)
0086 {
0087   alt_icache_flush(i_addr, n_bytes);
0088 }
0089
0090 static inline void _CPU_cache_freeze_instruction(void)
0091 {
0092   /* TODO */
0093 }
0094
0095 static inline void _CPU_cache_unfreeze_instruction(void)
0096 {
0097   /* TODO */
0098 }
0099
0100 static inline void _CPU_cache_flush_entire_data(void)
0101 {
0102   alt_dcache_flush_all();
0103 }
0104
0105 static inline void _CPU_cache_invalidate_entire_data(void)
0106 {
0107   alt_dcache_flush_all();
0108 }
0109
0110 static inline void _CPU_cache_enable_data(void)
0111 {
0112 }
0113
0114 static inline void _CPU_cache_disable_data(void)
0115 {
0116 }
0117
0118 static inline void _CPU_cache_invalidate_entire_instruction(void)
0119 {
0120   alt_icache_flush_all();
0121 }
0122
0123 static inline void _CPU_cache_enable_instruction(void)
0124 {
0125 }
0126
0127 static inline void _CPU_cache_disable_instruction(void)
0128 {
0129 }
0130
0131 static inline size_t _CPU_cache_get_data_cache_size(uint32_t level)
0132 {
0133   return ALT_CPU_DCACHE_SIZE;
0134 }
0135
0136 static inline size_t _CPU_cache_get_instruction_cache_size(uint32_t level)
0137 {
0138   return ALT_CPU_ICACHE_SIZE;
0139 }
0140
0141 #include "../../shared/cache/cacheimpl.h"