griscv/start/bspstart.c

0001 /*
0002  * Copyright (c) 2018 embedded brains GmbH & Co. KG
0003  *
0004  * Redistribution and use in source and binary forms, with or without
0005  * modification, are permitted provided that the following conditions
0006  * are met:
0007  * 1. Redistributions of source code must retain the above copyright
0008  *    notice, this list of conditions and the following disclaimer.
0009  * 2. Redistributions in binary form must reproduce the above copyright
0010  *    notice, this list of conditions and the following disclaimer in the
0011  *    documentation and/or other materials provided with the distribution.
0012  *
0013  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
0014  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0015  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0016  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
0017  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
0018  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
0019  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
0020  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
0021  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
0022  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
0023  * SUCH DAMAGE.
0024  */
0025
0026 #include <bsp/bootcard.h>
0027 #include <bsp/fatal.h>
0028 #include <bsp/irq-generic.h>
0029
0030 #include <amba.h>
0031 #include <rtems/sysinit.h>
0032
0033 #if defined(RTEMS_SMP) || defined(RTEMS_MULTIPROCESSING)
0034 /* Irq used by shared memory driver and for inter-processor interrupts.
0035  * Can be overridden by being defined in the application.
0036  */
0037 const unsigned char GRLIB_mp_irq __attribute__((weak)) = 14;
0038 #endif
0039
0040 uint32_t GRLIB_Cpu_Index = 0;
0041
0042 #ifdef RTEMS_SMP
0043 uint32_t riscv_hart_count = 1;
0044 /* Index of the boot CPU. Set by the first CPU at boot to its CPU ID. */
0045 int GRLIB_Boot_Cpu = -1;
0046 #endif
0047
0048 void bsp_start(void)
0049 {
0050   bsp_interrupt_initialize();
0051 #ifdef RTEMS_SMP
0052   GRLIB_Cpu_Index = _CPU_SMP_Get_current_processor();
0053 #endif
0054 }
0055
0056 static struct ambapp_bus ambapp_plb_instance;
0057
0058 struct ambapp_bus *ambapp_plb( void )
0059 {
0060   struct ambapp_bus *plb;
0061
0062   plb = &ambapp_plb_instance;
0063
0064   if ( plb->root == NULL ) {
0065     ambapp_scan( plb, GRLIB_IO_AREA, NULL, NULL );
0066     gptimer_initialize();
0067     irqmp_initialize();
0068   }
0069
0070   return plb;
0071 }
0072
0073 static void amba_initialize( void )
0074 {
0075   (void) ambapp_plb();
0076 }
0077
0078 RTEMS_SYSINIT_ITEM(
0079   amba_initialize,
0080   RTEMS_SYSINIT_BSP_START,
0081   RTEMS_SYSINIT_ORDER_FIRST
0082 );