griscv/include/amba.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsRISCVGRLIBAMBA
0007  */
0008
0009 /*
0010  *  AMBA Plag & Play Bus Driver Macros
0011  *
0012  *  Macros used for AMBA Plug & Play bus scanning
0013  *
0014  *  COPYRIGHT (c) 2004.
0015  *  Gaisler Research
0016  *
0017  * Redistribution and use in source and binary forms, with or without
0018  * modification, are permitted provided that the following conditions
0019  * are met:
0020  * 1. Redistributions of source code must retain the above copyright
0021  *    notice, this list of conditions and the following disclaimer.
0022  * 2. Redistributions in binary form must reproduce the above copyright
0023  *    notice, this list of conditions and the following disclaimer in the
0024  *    documentation and/or other materials provided with the distribution.
0025  *
0026  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0027  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0028  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0029  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0030  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0031  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0032  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0033  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0034  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0035  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0036  * POSSIBILITY OF SUCH DAMAGE.
0037  */
0038
0039 #ifndef __AMBA_H__
0040 #define __AMBA_H__
0041
0042 /**
0043  * @defgroup RTEMSBSPsRISCVGRLIBAMBA RISC-V AMBA Driver Handler
0044  *
0045  * @ingroup RTEMSBSPsRISCVGRLIB
0046  *
0047  * @ingroup RTEMSBSPsSharedGRLIB
0048  *
0049  * @brief AMBA Plag & Play Bus Driver Macros
0050  *
0051  * @{
0052  */
0053
0054 #ifndef GRLIB_IO_AREA
0055 #define GRLIB_IO_AREA 0xfff00000
0056 #endif
0057
0058 #define GRLIB_CONF_AREA 0xff000
0059 #define GRLIB_AHB_SLAVE_CONF_AREA (1 << 11)
0060
0061 #define GRLIB_AHB_CONF_WORDS 8
0062 #define GRLIB_APB_CONF_WORDS 2
0063 #define GRLIB_AHB_MASTERS 64
0064 #define GRLIB_AHB_SLAVES 64
0065 #define GRLIB_APB_SLAVES 16
0066
0067 #if defined(RTEMS_MULTIPROCESSING)
0068   #define GRLIB_CLOCK_INDEX \
0069    (rtems_configuration_get_user_multiprocessing_table() ? GRLIB_Cpu_Index : 0)
0070 #else
0071   #define GRLIB_CLOCK_INDEX 0
0072 #endif
0073
0074 #if defined(RTEMS_SMP)
0075 #define GRLIB_COUNTER_GPTIMER_INDEX (GRLIB_CLOCK_INDEX + 1)
0076 #else
0077 #define GRLIB_COUNTER_GPTIMER_INDEX GRLIB_CLOCK_INDEX
0078 #endif
0079
0080 #define GRLIB_GPTIMER_0_FREQUENCY_SET_BY_BOOT_LOADER 1000000
0081
0082 #define GRLIB_IRQMPSTATUS_CPUNR     28
0083
0084 #include <grlib/ambapp.h>
0085 #include <grlib/grlib.h>
0086
0087 #ifdef __cplusplus
0088 extern "C" {
0089 #endif
0090
0091 extern uint32_t GRLIB_Cpu_Index;
0092 extern const unsigned char GRLIB_mp_irq;
0093
0094 extern volatile struct irqmp_regs *GRLIB_IrqCtrl_Regs;
0095 extern struct ambapp_dev *GRLIB_IrqCtrl_Adev;
0096 extern int GRLIB_IrqCtrl_EIrq;
0097 extern volatile struct gptimer_regs *GRLIB_Timer_Regs;
0098 extern struct ambapp_dev *GRLIB_Timer_Adev;
0099 void gptimer_initialize(void);
0100 void irqmp_initialize(void);
0101
0102 static inline uint32_t grlib_up_counter_frequency(void)
0103 {
0104   /*
0105    * For simplicity, assume that the interrupt controller uses the processor
0106    * clock.  This is at least true on the GR740.
0107    */
0108   return ambapp_freq_get(ambapp_plb(), GRLIB_IrqCtrl_Adev);
0109 }
0110
0111 extern rtems_interrupt_lock GRLIB_IrqCtrl_Lock;
0112
0113
0114 static inline uint32_t grlib_get_cpu_count(
0115   volatile struct irqmp_regs *irqmp
0116 )
0117 {
0118   uint32_t mpstat = irqmp->mpstat;
0119
0120   return ((mpstat >> GRLIB_IRQMPSTATUS_CPUNR) & 0xf)  + 1;
0121 }
0122
0123 #define GRLIB_IRQCTRL_ACQUIRE( _lock_context ) \
0124   rtems_interrupt_lock_acquire( &GRLIB_IrqCtrl_Lock, _lock_context )
0125
0126 #define GRLIB_IRQCTRL_RELEASE( _lock_context ) \
0127   rtems_interrupt_lock_release( &GRLIB_IrqCtrl_Lock, _lock_context )
0128
0129 #define GRLIB_Cpu_Unmask_interrupt( _source, _cpu ) \
0130   do { \
0131     rtems_interrupt_lock_context _lock_context; \
0132     GRLIB_IRQCTRL_ACQUIRE( &_lock_context ); \
0133     GRLIB_IrqCtrl_Regs->mask[_cpu]  |= (1U << (_source)); \
0134     GRLIB_IRQCTRL_RELEASE( &_lock_context ); \
0135   } while (0)
0136
0137 #define GRLIB_Cpu_Mask_interrupt( _source, _cpu ) \
0138   do { \
0139     rtems_interrupt_lock_context _lock_context; \
0140     GRLIB_IRQCTRL_ACQUIRE( &_lock_context ); \
0141      GRLIB_IrqCtrl_Regs->mask[_cpu]  &= ~(1U << (_source)); \
0142     GRLIB_IRQCTRL_RELEASE( &_lock_context ); \
0143   } while (0)
0144
0145 #define GRLIB_Enable_interrupt_broadcast( _source ) \
0146   do { \
0147     rtems_interrupt_lock_context _lock_context; \
0148     uint32_t _mask = 1U << ( _source ); \
0149     GRLIB_IRQCTRL_ACQUIRE( &_lock_context ); \
0150     GRLIB_IrqCtrl_Regs->bcast |= _mask; \
0151     GRLIB_IRQCTRL_RELEASE( &_lock_context ); \
0152   } while (0)
0153
0154 #define GRLIB_Disable_interrupt_broadcast( _source ) \
0155   do { \
0156     rtems_interrupt_lock_context _lock_context; \
0157     uint32_t _mask = 1U << ( _source ); \
0158     GRLIB_IRQCTRL_ACQUIRE( &_lock_context ); \
0159     GRLIB_IrqCtrl_Regs->bcast &= ~_mask; \
0160     GRLIB_IRQCTRL_RELEASE( &_lock_context ); \
0161   } while (0)
0162
0163 #define BSP_Cpu_Is_interrupt_masked( _source, _cpu ) \
0164      (!(GRLIB_IrqCtrl_Regs->mask[_cpu] & (1U << (_source))))
0165
0166 #ifdef __cplusplus
0167 }
0168 #endif
0169
0170 /** @} */
0171
0172 #endif /* __AMBA_H__ */