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File indexing completed on 2025-05-11 08:23:59
0001 /* SPDX-License-Identifier: BSD-2-Clause */ 0002 0003 /* 0004 * RTEMS BSP support for TQ modules 0005 * 0006 * This file contains definitions to interact with TQC's 0007 * processor modules. 0008 */ 0009 0010 /* 0011 * Copyright (c) 2007 embedded brains GmbH & Co. KG 0012 * 0013 * Redistribution and use in source and binary forms, with or without 0014 * modification, are permitted provided that the following conditions 0015 * are met: 0016 * 1. Redistributions of source code must retain the above copyright 0017 * notice, this list of conditions and the following disclaimer. 0018 * 2. Redistributions in binary form must reproduce the above copyright 0019 * notice, this list of conditions and the following disclaimer in the 0020 * documentation and/or other materials provided with the distribution. 0021 * 0022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 0023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 0024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 0025 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 0026 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 0027 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 0028 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 0029 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 0030 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 0031 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 0032 * POSSIBILITY OF SUCH DAMAGE. 0033 */ 0034 0035 #ifndef __TQM_H__ 0036 #define __TQM_H__ 0037 #include <rtems.h> 0038 0039 typedef struct { 0040 uint32_t sdram_size; /* existing SDRAM size */ 0041 uint32_t flash_base; /* start address flash */ 0042 uint32_t flash_size; /* existing Flash size */ 0043 uint32_t flash_offset; 0044 uint32_t sram_base; /* start address sram */ 0045 uint32_t sram_size; /* existing sram size */ 0046 uint32_t immr_base; /* start address internal memory map */ 0047 uint32_t reboot; /* reboot flag */ 0048 uint8_t ip_addr[4]; /* IP address */ 0049 uint8_t eth_addr[6]; /* ethernet (MAC) address */ 0050 uint8_t gap_42[2]; /* gap for alignment */ 0051 void (*put_char)(int c); /* function to output characters */ 0052 } tqm_bd_info_t; 0053 0054 #define TQM_BD_INFO_ADDR 0x3400 0055 #define TQM_BD_INFO (*(tqm_bd_info_t *)TQM_BD_INFO_ADDR) 0056 0057 #define TQM_CONF_INFO_BLOCK_ADDR 0x4001fe00 0058 0059 #define IMAP_ADDR ((unsigned int)0xfa200000) 0060 #define IMAP_SIZE ((unsigned int)(64 * 1024)) 0061 0062 #endif /* __TQM_H__ */
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