include/bsp/8xx_immap.h

0001 /*
0002  * RTEMS BSP support for TQ modules
0003  *
0004  * This file contains definitions to interact with TQC's
0005  * processor modules.
0006  *
0007  * derived from mbx8xx BSP
0008  *
0009  * MPC8xx Internal Memory Map
0010  */
0011
0012 /*
0013  * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
0014  * Copyright (c) 2007 embedded brains GmbH & Co. KG
0015  *
0016  * The license and distribution terms for this file may be
0017  * found in the file LICENSE in this distribution or at
0018  * http://www.rtems.org/license/LICENSE.
0019  */
0020
0021 /*
0022  * The I/O on the MPC860 is comprised of blocks of special registers
0023  * and the dual port ram for the Communication Processor Module.
0024  * Within this space are functional units such as the SIU, memory
0025  * controller, system timers, and other control functions.  It is
0026  * a combination that I found difficult to separate into logical
0027  * functional files.....but anyone else is welcome to try.  -- Dan
0028  */
0029 #ifndef __IMMAP_8XX__
0030 #define __IMMAP_8XX__
0031
0032 /* System configuration registers.
0033 */
0034 typedef struct sys_conf {
0035     unsigned int    sc_siumcr;
0036     unsigned int    sc_sypcr;
0037     unsigned int    sc_swt;
0038     char        res1[2];
0039     unsigned short  sc_swsr;
0040     unsigned int    sc_sipend;
0041     unsigned int    sc_simask;
0042     unsigned int    sc_siel;
0043     unsigned int    sc_sivec;
0044     unsigned int    sc_tesr;
0045     char        res2[0xc];
0046     unsigned int    sc_sdcr;
0047     char        res3[0x4c];
0048 } sysconf8xx_t;
0049
0050 /* PCMCIA configuration registers.
0051 */
0052 typedef struct pcmcia_conf {
0053     unsigned int    pcmc_pbr0;
0054     unsigned int    pcmc_por0;
0055     unsigned int    pcmc_pbr1;
0056     unsigned int    pcmc_por1;
0057     unsigned int    pcmc_pbr2;
0058     unsigned int    pcmc_por2;
0059     unsigned int    pcmc_pbr3;
0060     unsigned int    pcmc_por3;
0061     unsigned int    pcmc_pbr4;
0062     unsigned int    pcmc_por4;
0063     unsigned int    pcmc_pbr5;
0064     unsigned int    pcmc_por5;
0065     unsigned int    pcmc_pbr6;
0066     unsigned int    pcmc_por6;
0067     unsigned int    pcmc_pbr7;
0068     unsigned int    pcmc_por7;
0069     char        res1[0x20];
0070     unsigned int    pcmc_pgcra;
0071     unsigned int    pcmc_pgcrb;
0072     unsigned int    pcmc_pscr;
0073     char        res2[4];
0074     unsigned int    pcmc_pipr;
0075     char        res3[4];
0076     unsigned int    pcmc_per;
0077     char        res4[4];
0078 } pcmconf8xx_t;
0079
0080 /* Memory controller registers.
0081 */
0082 typedef struct  mem_ctlr {
0083     unsigned int    memc_br0;
0084     unsigned int    memc_or0;
0085     unsigned int    memc_br1;
0086     unsigned int    memc_or1;
0087     unsigned int    memc_br2;
0088     unsigned int    memc_or2;
0089     unsigned int    memc_br3;
0090     unsigned int    memc_or3;
0091     unsigned int    memc_br4;
0092     unsigned int    memc_or4;
0093     unsigned int    memc_br5;
0094     unsigned int    memc_or5;
0095     unsigned int    memc_br6;
0096     unsigned int    memc_or6;
0097     unsigned int    memc_br7;
0098     unsigned int    memc_or7;
0099     char        res1[0x24];
0100     unsigned int    memc_mar;
0101     unsigned int    memc_mcr;
0102     char        res2[4];
0103     unsigned int    memc_mamr;
0104     unsigned int    memc_mbmr;
0105     unsigned short  memc_mstat;
0106     unsigned short  memc_mptpr;
0107     unsigned int    memc_mdr;
0108     char        res3[0x80];
0109 } memctl8xx_t;
0110
0111 /* System Integration Timers.
0112 */
0113 typedef struct  sys_int_timers {
0114     unsigned short  sit_tbscr;
0115     unsigned int    sit_tbreff0;
0116     unsigned int    sit_tbreff1;
0117     char        res1[0x14];
0118     unsigned short  sit_rtcsc;
0119     unsigned int    sit_rtc;
0120     unsigned int    sit_rtsec;
0121     unsigned int    sit_rtcal;
0122     char        res2[0x10];
0123     unsigned short  sit_piscr;
0124     char        res3[2];
0125     unsigned int    sit_pitc;
0126     unsigned int    sit_pitr;
0127     char        res4[0x34];
0128 } sit8xx_t;
0129
0130 #define TBSCR_TBIRQ_MASK    ((unsigned short)0xff00)
0131 #define TBSCR_REFA      ((unsigned short)0x0080)
0132 #define TBSCR_REFB      ((unsigned short)0x0040)
0133 #define TBSCR_REFAE     ((unsigned short)0x0008)
0134 #define TBSCR_REFBE     ((unsigned short)0x0004)
0135 #define TBSCR_TBF       ((unsigned short)0x0002)
0136 #define TBSCR_TBE       ((unsigned short)0x0001)
0137
0138 #define RTCSC_RTCIRQ_MASK   ((unsigned short)0xff00)
0139 #define RTCSC_SEC       ((unsigned short)0x0080)
0140 #define RTCSC_ALR       ((unsigned short)0x0040)
0141 #define RTCSC_38K       ((unsigned short)0x0010)
0142 #define RTCSC_SIE       ((unsigned short)0x0008)
0143 #define RTCSC_ALE       ((unsigned short)0x0004)
0144 #define RTCSC_RTF       ((unsigned short)0x0002)
0145 #define RTCSC_RTE       ((unsigned short)0x0001)
0146
0147 #define PISCR_PIRQ_MASK     ((unsigned short)0xff00)
0148 #define PISCR_PS        ((unsigned short)0x0080)
0149 #define PISCR_PIE       ((unsigned short)0x0004)
0150 #define PISCR_PTF       ((unsigned short)0x0002)
0151 #define PISCR_PTE       ((unsigned short)0x0001)
0152
0153 /* Clocks and Reset.
0154 */
0155 typedef struct clk_and_reset {
0156     unsigned int    car_sccr;
0157     unsigned int    car_plprcr;
0158     unsigned int    car_rsr;
0159     char        res[0x74];        /* Reserved area                  */
0160 } car8xx_t;
0161
0162 /* System Integration Timers keys.
0163 */
0164 typedef struct sitk {
0165     unsigned int    sitk_tbscrk;
0166     unsigned int    sitk_tbreff0k;
0167     unsigned int    sitk_tbreff1k;
0168     unsigned int    sitk_tbk;
0169     char        res1[0x10];
0170     unsigned int    sitk_rtcsck;
0171     unsigned int    sitk_rtck;
0172     unsigned int    sitk_rtseck;
0173     unsigned int    sitk_rtcalk;
0174     char        res2[0x10];
0175     unsigned int    sitk_piscrk;
0176     unsigned int    sitk_pitck;
0177     char        res3[0x38];
0178 } sitk8xx_t;
0179
0180 /* Clocks and reset keys.
0181 */
0182 typedef struct cark {
0183     unsigned int    cark_sccrk;
0184     unsigned int    cark_plprcrk;
0185     unsigned int    cark_rsrk;
0186     char        res[0x474];
0187 } cark8xx_t;
0188
0189 /* The key to unlock registers maintained by keep-alive power.
0190 */
0191 #define KAPWR_KEY   ((unsigned int)0x55ccaa33)
0192
0193 /* LCD interface.  MPC821 Only.
0194 */
0195 typedef struct lcd {
0196     unsigned short  lcd_lcolr[16];
0197     char        res[0x20];
0198     unsigned int    lcd_lccr;
0199     unsigned int    lcd_lchcr;
0200     unsigned int    lcd_lcvcr;
0201     char        res2[4];
0202     unsigned int    lcd_lcfaa;
0203     unsigned int    lcd_lcfba;
0204     char        lcd_lcsr;
0205     char        res3[0x7];
0206 } lcd8xx_t;
0207
0208 /* I2C
0209 */
0210 typedef struct i2c {
0211     unsigned char   i2c_i2mod;
0212     char        res1[3];
0213     unsigned char   i2c_i2add;
0214     char        res2[3];
0215     unsigned char   i2c_i2brg;
0216     char        res3[3];
0217     unsigned char   i2c_i2com;
0218     char        res4[3];
0219     unsigned char   i2c_i2cer;
0220     char        res5[3];
0221     unsigned char   i2c_i2cmr;
0222     char        res6[0x8b];
0223 } i2c8xx_t;
0224
0225 /* DMA control/status registers.
0226 */
0227 typedef struct sdma_csr {
0228     char        res1[4];
0229     unsigned int    sdma_sdar;
0230     unsigned char   sdma_sdsr;
0231     char        res3[3];
0232     unsigned char   sdma_sdmr;
0233     char        res4[3];
0234     unsigned char   sdma_idsr1;
0235     char        res5[3];
0236     unsigned char   sdma_idmr1;
0237     char        res6[3];
0238     unsigned char   sdma_idsr2;
0239     char        res7[3];
0240     unsigned char   sdma_idmr2;
0241     char        res8[0x13];
0242 } sdma8xx_t;
0243
0244 /* Communication Processor Module Interrupt Controller.
0245 */
0246 typedef struct cpm_ic {
0247     unsigned short  cpic_civr;
0248     char        res[0xe];
0249     unsigned int    cpic_cicr;
0250     unsigned int    cpic_cipr;
0251     unsigned int    cpic_cimr;
0252     unsigned int    cpic_cisr;
0253 } cpic8xx_t;
0254
0255 /* Input/Output Port control/status registers.
0256 */
0257 typedef struct io_port {
0258     unsigned short  iop_padir;
0259     unsigned short  iop_papar;
0260     unsigned short  iop_paodr;
0261     unsigned short  iop_padat;
0262     char        res1[8];
0263     unsigned short  iop_pcdir;
0264     unsigned short  iop_pcpar;
0265     unsigned short  iop_pcso;
0266     unsigned short  iop_pcdat;
0267     unsigned short  iop_pcint;
0268     char        res2[6];
0269     unsigned short  iop_pddir;
0270     unsigned short  iop_pdpar;
0271     char        res3[2];
0272     unsigned short  iop_pddat;
0273     char        res4[8];
0274 } iop8xx_t;
0275
0276 /* Communication Processor Module Timers
0277 */
0278 typedef struct cpm_timers {
0279     unsigned short  cpmt_tgcr;
0280     char        res1[0xe];
0281     unsigned short  cpmt_tmr1;
0282     unsigned short  cpmt_tmr2;
0283     unsigned short  cpmt_trr1;
0284     unsigned short  cpmt_trr2;
0285     unsigned short  cpmt_tcr1;
0286     unsigned short  cpmt_tcr2;
0287     unsigned short  cpmt_tcn1;
0288     unsigned short  cpmt_tcn2;
0289     unsigned short  cpmt_tmr3;
0290     unsigned short  cpmt_tmr4;
0291     unsigned short  cpmt_trr3;
0292     unsigned short  cpmt_trr4;
0293     unsigned short  cpmt_tcr3;
0294     unsigned short  cpmt_tcr4;
0295     unsigned short  cpmt_tcn3;
0296     unsigned short  cpmt_tcn4;
0297     unsigned short  cpmt_ter1;
0298     unsigned short  cpmt_ter2;
0299     unsigned short  cpmt_ter3;
0300     unsigned short  cpmt_ter4;
0301     char        res2[8];
0302 } cpmtimer8xx_t;
0303
0304 /* Finally, the Communication Processor stuff.....
0305 */
0306 typedef struct scc {        /* Serial communication channels */
0307     unsigned int    scc_gsmrl;
0308     unsigned int    scc_gsmrh;
0309     unsigned short  scc_pmsr;
0310     char        res1[2];
0311     unsigned short  scc_todr;
0312     unsigned short  scc_dsr;
0313     unsigned short  scc_scce;
0314     char        res2[2];
0315     unsigned short  scc_sccm;
0316     char        res3;
0317     unsigned char   scc_sccs;
0318     char        res4[8];
0319 } scc_t;
0320
0321 typedef struct smc {        /* Serial management channels */
0322     char        res1[2];
0323     unsigned short  smc_smcmr;
0324     char        res2[2];
0325     unsigned char   smc_smce;
0326     char        res3[3];
0327     unsigned char   smc_smcm;
0328     char        res4[5];
0329 } smc_t;
0330
0331 /* MPC860T Fast Ethernet Controller.  It isn't part of the CPM, but
0332  * it fits within the address space.
0333  */
0334 typedef struct fec {
0335     unsigned int    fec_addr_low;       /* LS 32 bits of station address */
0336     unsigned short  fec_addr_high;      /* MS 16 bits of address */
0337     unsigned short  res1;
0338     unsigned int    fec_hash_table_high;
0339     unsigned int    fec_hash_table_low;
0340     unsigned int    fec_r_des_start;
0341     unsigned int    fec_x_des_start;
0342     unsigned int    fec_r_buff_size;
0343     unsigned int    res2[9];
0344     unsigned int    fec_ecntrl;
0345     unsigned int    fec_ievent;
0346     unsigned int    fec_imask;
0347     unsigned int    fec_ivec;
0348     unsigned int    fec_r_des_active;
0349     unsigned int    fec_x_des_active;
0350     unsigned int    res3[10];
0351     unsigned int    fec_mii_data;
0352     unsigned int    fec_mii_speed;
0353     unsigned int    res4[17];
0354     unsigned int    fec_r_bound;
0355     unsigned int    fec_r_fstart;
0356     unsigned int    res5[6];
0357     unsigned int    fec_x_fstart;
0358     unsigned int    res6[17];
0359     unsigned int    fec_fun_code;
0360     unsigned int    res7[3];
0361     unsigned int    fec_r_cntrl;
0362     unsigned int    fec_r_hash;
0363     unsigned int    res8[14];
0364     unsigned int    fec_x_cntrl;
0365     unsigned int    res9[0x1e];
0366 } fec_t;
0367
0368 typedef struct comm_proc {
0369     /* General control and status registers.
0370     */
0371     unsigned short  cp_cpcr;
0372     char        res1[2];
0373     unsigned short  cp_rccr;
0374     char        res2[6];
0375     unsigned short  cp_cpmcr1;
0376     unsigned short  cp_cpmcr2;
0377     unsigned short  cp_cpmcr3;
0378     unsigned short  cp_cpmcr4;
0379     char        res3[2];
0380     unsigned short  cp_rter;
0381     char        res4[2];
0382     unsigned short  cp_rtmr;
0383     char        res5[0x14];
0384
0385     /* Baud rate generators.
0386     */
0387     unsigned int    cp_brgc1;
0388     unsigned int    cp_brgc2;
0389     unsigned int    cp_brgc3;
0390     unsigned int    cp_brgc4;
0391
0392     /* Serial Communication Channels.
0393     */
0394     scc_t   cp_scc[4];
0395
0396     /* Serial Management Channels.
0397     */
0398     smc_t   cp_smc[2];
0399
0400     /* Serial Peripheral Interface.
0401     */
0402     unsigned short  cp_spmode;
0403     char        res6[4];
0404     unsigned char   cp_spie;
0405     char        res7[3];
0406     unsigned char   cp_spim;
0407     char        res8[2];
0408     unsigned char   cp_spcom;
0409     char        res9[2];
0410
0411     /* Parallel Interface Port.
0412     */
0413     char        res10[2];
0414     unsigned short  cp_pipc;
0415     char        res11[2];
0416     unsigned short  cp_ptpr;
0417     unsigned int    cp_pbdir;
0418     unsigned int    cp_pbpar;
0419     char        res12[2];
0420     unsigned short  cp_pbodr;
0421     unsigned int    cp_pbdat;
0422     char        res13[0x18];
0423
0424     /* Serial Interface and Time Slot Assignment.
0425     */
0426     unsigned int    cp_simode;
0427     unsigned char   cp_sigmr;
0428     char        res14;
0429     unsigned char   cp_sistr;
0430     unsigned char   cp_sicmr;
0431     char        res15[4];
0432     unsigned int    cp_sicr;
0433     unsigned int    cp_sirp;
0434     char        res16[0x10c];
0435     unsigned char   cp_siram[0x200];
0436
0437     /* The fast ethernet controller is not really part of the CPM,
0438      * but it resides in the address space.
0439      */
0440     fec_t       cp_fec;
0441     char        res18[0x1000];
0442
0443     /* Dual Ported RAM follows.
0444      * There are many different formats for this memory area
0445      * depending upon the devices used and options chosen.
0446      */
0447     unsigned char   cp_dpmem[0x1000];   /* BD / Data / ucode */
0448     unsigned char   res19[0xc00];
0449     unsigned char   cp_dparam[0x400];   /* Parameter RAM */
0450 } cpm8xx_t;
0451
0452 /* Internal memory map.
0453 */
0454 typedef struct immap {
0455     sysconf8xx_t    im_siu_conf;    /* SIU Configuration */
0456     pcmconf8xx_t    im_pcmcia;  /* PCMCIA Configuration */
0457     memctl8xx_t im_memctl;  /* Memory Controller */
0458     sit8xx_t    im_sit;     /* System integration timers */
0459     car8xx_t    im_clkrst;  /* Clocks and reset */
0460     sitk8xx_t   im_sitk;    /* Sys int timer keys */
0461     cark8xx_t   im_clkrstk; /* Clocks and reset keys */
0462     lcd8xx_t    im_lcd;     /* LCD (821 only) */
0463     i2c8xx_t    im_i2c;     /* I2C control/status */
0464     sdma8xx_t   im_sdma;    /* SDMA control/status */
0465     cpic8xx_t   im_cpic;    /* CPM Interrupt Controller */
0466     iop8xx_t    im_ioport;  /* IO Port control/status */
0467     cpmtimer8xx_t   im_cpmtimer;    /* CPM timers */
0468     cpm8xx_t    im_cpm;     /* Communication processor */
0469 } immap_t;
0470
0471 #endif /* __IMMAP_8XX__ */