t32mppc/start/bspstart.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * Copyright (C) 2012, 2017 embedded brains GmbH & Co. KG
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions
0008  * are met:
0009  * 1. Redistributions of source code must retain the above copyright
0010  *    notice, this list of conditions and the following disclaimer.
0011  * 2. Redistributions in binary form must reproduce the above copyright
0012  *    notice, this list of conditions and the following disclaimer in the
0013  *    documentation and/or other materials provided with the distribution.
0014  *
0015  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0016  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0017  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0018  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0019  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0020  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0021  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0022  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0023  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0024  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0025  * POSSIBILITY OF SUCH DAMAGE.
0026  */
0027
0028 #include <rtems/config.h>
0029 #include <rtems/counter.h>
0030
0031 #include <bsp.h>
0032 #include <bsp/vectors.h>
0033 #include <bsp/bootcard.h>
0034 #include <bsp/irq-generic.h>
0035 #include <bsp/linker-symbols.h>
0036
0037 LINKER_SYMBOL(bsp_exc_vector_base);
0038
0039 /*
0040  * Configuration parameter for clock driver.  The Trace32 PowerPC simulator has
0041  * an odd decrementer frequency.  The time base frequency is one tick per
0042  * instruction.  The decrementer frequency is one tick per ten instructions.
0043  * The clock driver assumes that the time base and decrementer frequencies are
0044  * equal.  For now we simulate processor that issues 10000000 instructions per
0045  * second.
0046  */
0047 uint32_t bsp_time_base_frequency = 10000000;
0048
0049 #define MTIVPR(base) \
0050   __asm__ volatile ("mtivpr %0" : : "r" (base))
0051
0052 #define VECTOR_TABLE_ENTRY_SIZE 16
0053
0054 #define MTIVOR(vec, offset) \
0055   do { \
0056     __asm__ volatile ("mtspr " RTEMS_XSTRING(vec) ", %0" : : "r" (offset)); \
0057     offset += VECTOR_TABLE_ENTRY_SIZE; \
0058   } while (0)
0059
0060 static void t32mppc_initialize_exceptions(void)
0061 {
0062   uintptr_t addr;
0063
0064   ppc_exc_initialize_interrupt_stack(
0065     (uintptr_t) _ISR_Stack_area_begin
0066   );
0067
0068   addr = (uintptr_t) bsp_exc_vector_base;
0069   MTIVPR(addr);
0070   MTIVOR(BOOKE_IVOR0,  addr);
0071   MTIVOR(BOOKE_IVOR1,  addr);
0072   MTIVOR(BOOKE_IVOR2,  addr);
0073   MTIVOR(BOOKE_IVOR3,  addr);
0074   MTIVOR(BOOKE_IVOR4,  addr);
0075   MTIVOR(BOOKE_IVOR5,  addr);
0076   MTIVOR(BOOKE_IVOR6,  addr);
0077   MTIVOR(BOOKE_IVOR7,  addr);
0078   MTIVOR(BOOKE_IVOR8,  addr);
0079   MTIVOR(BOOKE_IVOR9,  addr);
0080   MTIVOR(BOOKE_IVOR10, addr);
0081   MTIVOR(BOOKE_IVOR11, addr);
0082   MTIVOR(BOOKE_IVOR12, addr);
0083   MTIVOR(BOOKE_IVOR13, addr);
0084   MTIVOR(BOOKE_IVOR14, addr);
0085   MTIVOR(BOOKE_IVOR15, addr);
0086   MTIVOR(BOOKE_IVOR32, addr);
0087   MTIVOR(BOOKE_IVOR33, addr);
0088   MTIVOR(BOOKE_IVOR34, addr);
0089   MTIVOR(BOOKE_IVOR35, addr);
0090 }
0091
0092 uint32_t _CPU_Counter_frequency(void)
0093 {
0094   return bsp_time_base_frequency;
0095 }
0096
0097 void bsp_start(void)
0098 {
0099   get_ppc_cpu_type();
0100   get_ppc_cpu_revision();
0101   t32mppc_initialize_exceptions();
0102   bsp_interrupt_initialize();
0103 }