ss555/start/start.S

0001 /*
0002  *  This file contains the entry veneer for RTEMS programs on the Intec
0003  *  SS555 board.  It jumps to the BSP which is responsible for performing
0004  *  all remaining initialization.
0005  */
0006
0007 /*
0008  * This file is based on several others:
0009  *
0010  * (1) start360.s from the gen68360 BSP by
0011  *     W. Eric Norum (eric@norum.ca)
0012  *     with the following copyright and license:
0013  *
0014  *     COPYRIGHT (c) 1989-1998.
0015  *     On-Line Applications Research Corporation (OAR).
0016  *
0017  *     The license and distribution terms for this file may in
0018  *     the file LICENSE in this distribution or at
0019  *     http://www.rtems.org/license/LICENSE.
0020  *
0021  * (2) start.s for the eth_comm port by
0022  *     Jay Monkman (jmonkman@fracsa.com),
0023  *     which itself is based on the
0024  *
0025  * (3) dlentry.s for the Papyrus BSP, written by:
0026  *     Andrew Bray <andy@i-cubed.co.uk>
0027  *     with the following copyright and license:
0028  *
0029  *     COPYRIGHT (c) 1995 by i-cubed ltd.
0030  *
0031  * (4) start860.S for the MBX821/MBX860, written by:
0032  *     Darlene A. Stewart <darlene.stewart@iit.nrc.ca>
0033  *     Copyright (c) 1999, National Research Council of Canada
0034  *
0035  *     To anyone who acknowledges that this file is provided "AS IS"
0036  *     without any express or implied warranty:
0037  *         permission to use, copy, modify, and distribute this file
0038  *         for any purpose is hereby granted without fee, provided that
0039  *         the above copyright notice and this notice appears in all
0040  *         copies, and that the name of i-cubed limited not be used in
0041  *         advertising or publicity pertaining to distribution of the
0042  *         software without specific, written prior permission.
0043  *         i-cubed limited makes no representations about the suitability
0044  *         of this software for any purpose.
0045  *
0046  * (5) Modifications (for MBX8xx) of respective RTEMS files:
0047  *     Copyright (c) 1999, National Research Council of Canada
0048  *
0049  * SS555 port sponsored by Defence Research and Development Canada - Suffield
0050  * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
0051  */
0052
0053 #include <rtems/asm.h>
0054 #include <rtems/powerpc/registers.h>
0055
0056 #include <bsp.h>
0057
0058 /*
0059  *  The initial stack is set to the top of the internal RAM.
0060  *
0061  *  All the entry veneer has to do is to clear the .bss section and copy the
0062  *  initializers into the .data section.
0063  */
0064
0065 /*
0066  *  GDB likes to have debugging information for the entry veneer.
0067  *  Play compiler and provide some DWARF information.
0068  *
0069  *  CHANGE TO SUIT YOUR SETUP!
0070  */
0071
0072         .section .entry,"ax",@progbits
0073 .L_text_b:
0074 .L_LC1:
0075     .previous
0076
0077 .section    .debug_sfnames
0078 .L_sfnames_b:
0079     .byte "rtems/c/src/lib/libbsp/powerpc/ss555/startup/"
0080     .byte 0
0081 .L_F0:
0082     .byte "start.S"
0083     .byte 0
0084     .previous
0085
0086 .section    .line
0087 .L_line_b:
0088     .4byte  .L_line_e-.L_line_b
0089     .4byte  .L_text_b
0090 .L_LE1:
0091 .L_line_last:
0092     .4byte  0x0
0093     .2byte  0xffff
0094     .4byte  .L_text_e-.L_text_b
0095 .L_line_e:
0096     .previous
0097
0098 .section    .debug_srcinfo
0099 .L_srcinfo_b:
0100     .4byte  .L_line_b
0101     .4byte  .L_sfnames_b
0102     .4byte  .L_text_b
0103     .4byte  .L_text_e
0104     .4byte  0xffffffff
0105     .4byte  .L_LE1-.L_line_b
0106     .4byte  .L_F0-.L_sfnames_b
0107     .4byte  .L_line_last-.L_line_b
0108     .4byte  0xffffffff
0109     .previous
0110
0111 .section    .debug_pubnames
0112     .4byte  .L_debug_b
0113     .4byte  .L_P0
0114     .byte "start"
0115     .byte 0
0116     .4byte  0x0
0117     .byte 0
0118     .previous
0119
0120 .section    .debug_aranges
0121     .4byte  .L_debug_b
0122     .4byte  .L_text_b
0123     .4byte  .L_text_e-.L_text_b
0124     .4byte  0
0125     .4byte  0
0126     .4byte  0
0127     .4byte  0
0128     .4byte  0
0129     .4byte  0
0130     .4byte  0x0
0131     .4byte  0x0
0132     .previous
0133
0134 .section    .debug
0135 .L_debug_b:
0136 .L_D1:
0137     .4byte  .L_D1_e-.L_D1
0138     .2byte  0x11    /* TAG_compile_unit */
0139     .2byte  0x12    /* AT_sibling */
0140     .4byte  .L_D2
0141     .2byte  0x38    /* AT_name */
0142     .byte "start.S"
0143     .byte 0
0144     .2byte  0x258   /* AT_producer */
0145     .byte "GAS 2.5.2"
0146     .byte 0
0147     .2byte  0x111   /* AT_low_pc */
0148     .4byte  .L_text_b
0149     .2byte  0x121   /* AT_high_pc */
0150     .4byte  .L_text_e
0151     .2byte  0x106   /* AT_stmt_list */
0152     .4byte  .L_line_b
0153     .2byte  0x1b8   /* AT_comp_dir */
0154     .byte "rtems/c/src/lib/libbsp/powerpc/ss555/startup/"
0155     .byte 0
0156     .2byte  0x8006  /* AT_sf_names */
0157     .4byte  .L_sfnames_b
0158     .2byte  0x8016  /* AT_src_info */
0159     .4byte  .L_srcinfo_b
0160 .L_D1_e:
0161 .L_P0:
0162 .L_D3:
0163     .4byte  .L_D3_e-.L_D3
0164     .2byte  0x6 /* TAG_global_subroutine */
0165     .2byte  0x12    /* AT_sibling */
0166     .4byte  .L_D4
0167     .2byte  0x38    /* AT_name */
0168     .byte "start"
0169     .byte 0
0170     .2byte  0x278   /* AT_prototyped */
0171     .byte 0
0172     .2byte  0x111   /* AT_low_pc */
0173     .4byte  .L_text_b
0174     .2byte  0x121   /* AT_high_pc */
0175     .4byte  .L_text_e
0176     .2byte  0x8041  /* AT_body_begin */
0177     .4byte  .L_text_b
0178     .2byte  0x8051  /* AT_body_end */
0179     .4byte  .L_text_e
0180 .L_D3_e:
0181
0182 .L_D4:
0183     .4byte  .L_D4_e-.L_D4
0184     .align 2
0185 .L_D4_e:
0186 .L_D2:
0187     .previous
0188
0189 /* That should do it */
0190
0191 /*
0192  *  Put the entry point in its own section. That way, we can guarantee
0193  *  to put it first in the .text section in the linker script.
0194  */
0195         .section .entry
0196
0197         PUBLIC_VAR (start)
0198 SYM(start):
0199         bl      .startup    /* or bl .spin */
0200 base_addr:
0201
0202 /*
0203  * Parameters from linker
0204  */
0205 stack_top:
0206     .long   _ISR_Stack_area_end
0207
0208 toc_pointer:
0209         .long   __GOT_START__
0210
0211 bss_length:
0212         .long   bss.size
0213 bss_addr:
0214         .long   bss.start
0215
0216 data_length:
0217         .long   data.size
0218 data_addr:
0219         .long   data.start
0220 contents_addr:
0221         .long   data.contents.start
0222
0223 PUBLIC_VAR (text_addr)
0224 text_addr:
0225         .long   text.start
0226
0227 PUBLIC_VAR (text_length)
0228 text_length:
0229         .long   text.size
0230
0231 /*
0232  * Spin, if necessary, to acquire control from debugger (CodeWarrior).
0233  */
0234 spin:
0235     .long   0x0001
0236 .spin:
0237     lis r3, spin@ha
0238     lwz r3, spin@l(r3)
0239     cmpwi   r3, 0x1
0240     beq .spin
0241
0242 /*
0243  * Initialization code
0244  */
0245 .startup:
0246         /* Capture address of linker parameters. */
0247         mflr    r3
0248
0249     /* Set initial stack pointer to end of internal RAM - 56. */
0250     lwz r1, stack_top-base_addr(r3)
0251         addi    r1, r1, -56
0252
0253         /* Initialize essential registers. */
0254         bl      initregs
0255
0256         /* Set TOC pointer */
0257         lwz r2, toc_pointer-base_addr(r3)
0258
0259         /* Initialize the memory mapped MPC555 registers (done in C). */
0260         EXTERN_PROC (_InitSS555)
0261         bl  PROC (_InitSS555)
0262
0263         /* Clear the .bss section. */
0264         bl      bssclr
0265
0266     /* Copy initializers into the .data section */
0267     bl  datacopy
0268
0269     /* Enable floating point, since gcc sometimes uses the floating
0270      * point registers for data moves, even if the C source code doesn't
0271      * include floating point operations.
0272      */
0273     mfmsr   r0
0274     ori r0, r0, MSR_FP
0275     mtmsr   r0
0276
0277     /* Start system. */
0278     li  r3, 0           /* command line */
0279         EXTERN_PROC (boot_card)
0280         bl       PROC (boot_card)   /* call the first C routine */
0281
0282         /* We should never return from boot_card, but in case we do ... */
0283     /* The next instructions are dependent on your runtime environment. */
0284
0285 stop_here:
0286     b   stop_here
0287
0288 /*
0289  * datacopy - copy initializers into .data section
0290  */
0291 datacopy:
0292     lis r3, base_addr@ha        /* point to linker data */
0293     addi    r3, r3, base_addr@l
0294
0295         lwz     r4, contents_addr-base_addr(r3) /* .data contents in ROM */
0296         lwz     r5, data_addr-base_addr(r3)     /* .data section in RAM */
0297         lwz     r6, data_length-base_addr(r3)   /* length of .data */
0298
0299         rlwinm. r6, r6, 30, 0x3FFFFFFF          /* form length / 4 */
0300         beqlr                                   /* no .data - return */
0301
0302         mtctr   r6                              /* set ctr reg */
0303 dc1:
0304     lwz r6, 0(r4)           /* get word */
0305         stw     r6, 0(r5)                       /* store word */
0306         addi    r4, r4, 0x4                     /* next source */
0307         addi    r5, r5, 0x4                     /* next target */
0308         bdnz    dc1                             /* dec counter and loop */
0309
0310         blr                                     /* return */
0311
0312 /*
0313  * bssclr - zero out bss
0314  */
0315 bssclr:
0316     lis r3, base_addr@ha        /* point to linker data */
0317     addi    r3, r3, base_addr@l
0318
0319         lwz     r4, bss_addr-base_addr(r3)      /* Start of bss */
0320         lwz     r5, bss_length-base_addr(r3)    /* Length of bss */
0321
0322         rlwinm. r5, r5, 30, 0x3FFFFFFF          /* form length/4 */
0323         beqlr                                   /* no bss - return */
0324
0325         mtctr   r5                              /* set ctr reg */
0326         li      r5, 0x0000                      /* r5 = 0 */
0327 clear_bss:
0328         stw     r5, 0(r4)                       /* store r6 */
0329         addi    r4, r4, 0x4                     /* update r4 */
0330         bdnz    clear_bss                       /* dec counter and loop */
0331
0332         blr                                     /* return */
0333
0334 /*
0335  * initregs
0336  *  Initialize the MSR and basic core PowerPC registers
0337  *
0338  * Register usage:
0339  *  r0 - scratch
0340  */
0341 initregs:
0342     /*
0343      * Set the processor for big-endian mode, exceptions vectored to
0344      * 0x000n_nnnn, no execution tracing, machine check exceptions
0345      * enabled, floating-point not available, supervisor priviledge
0346      * level, external interrupts disabled, power management disabled
0347      * (normal operation mode).
0348      */
0349     li  r0, 0x1000  /* MSR_ME */
0350     mtmsr   r0      /* Context-synchronizing */
0351     isync
0352
0353     /*
0354      * Clear the exception handling registers.
0355      */
0356     li  r0, 0x0000
0357     mtdar   r0
0358     mtspr   sprg0, r0
0359     mtspr   sprg1, r0
0360     mtspr   sprg2, r0
0361     mtspr   sprg3, r0
0362     mtspr   srr0, r0
0363     mtspr   srr1, r0
0364
0365     mr  r6, r0
0366     mr  r7, r0
0367     mr  r8, r0
0368     mr  r9, r0
0369     mr  r10, r0
0370     mr  r11, r0
0371     mr  r12, r0
0372     mr  r13, r0
0373     mr  r14, r0
0374     mr  r15, r0
0375     mr  r16, r0
0376     mr  r17, r0
0377     mr  r18, r0
0378     mr  r19, r0
0379     mr  r20, r0
0380     mr  r21, r0
0381     mr  r22, r0
0382     mr  r23, r0
0383     mr  r24, r0
0384     mr  r25, r0
0385     mr  r26, r0
0386     mr  r27, r0
0387     mr  r28, r0
0388     mr  r29, r0
0389     mr  r30, r0
0390     mr  r31, r0
0391
0392     blr         /* return */
0393
0394 .L_text_e: