ss555/include/tm27.h

0001 /*
0002  * @file
0003  * @ingroup powerpc_ss555
0004  * @brief Implementations for interrupt mechanisms for Time Test 27
0005  */
0006
0007 /*
0008  *  The license and distribution terms for this file may be
0009  *  found in the file LICENSE in this distribution or at
0010  *  http://www.rtems.org/license/LICENSE.
0011  */
0012
0013 #ifndef _RTEMS_TMTEST27
0014 #error "This is an RTEMS internal file you must not include directly."
0015 #endif
0016
0017 #ifndef __tm27_h
0018 #define __tm27_h
0019
0020 /*
0021  * Stuff for Time Test 27
0022  *
0023  * The following require that IRQ7 be jumpered to ground.  On the SS555,
0024  * this can be done by shorting together CN5 pin 48 and CN5 pin 50.
0025  */
0026
0027 #define MUST_WAIT_FOR_INTERRUPT 1
0028
0029 #define Install_tm27_vector( handler )                  \
0030 {                                   \
0031   extern rtems_irq_connect_data tm27IrqData;                            \
0032   usiu.siel |= (1 << 17);                       \
0033   usiu.sipend |= (1 << 17);                         \
0034                                     \
0035   tm27IrqData.hdl = handler;                        \
0036   BSP_install_rtems_irq_handler (&tm27IrqData);             \
0037 }
0038
0039 #define Cause_tm27_intr()                       \
0040 {                                   \
0041   usiu.siel &= ~(1 << 17);                      \
0042 }
0043
0044 #define Clear_tm27_intr()                       \
0045 {                                   \
0046   usiu.siel |= (1 << 17);                       \
0047   usiu.sipend |= (1 << 17);                         \
0048 }
0049
0050 #define Lower_tm27_intr()                       \
0051 {                                   \
0052   ppc_cached_irq_mask |= (1 << 17);                 \
0053   usiu.simask = ppc_cached_irq_mask;                    \
0054 }
0055
0056 #endif