ss555/clock/clock.c

0001 /*
0002  *  This routine initializes the PIT on the MPC5xx.
0003  *  The tick frequency is specified by the BSP.
0004  */
0005
0006 /*
0007  *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
0008  *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
0009  *
0010  *  Derived from c/src/lib/libcpu/powerpc/mpc8xx/clock/clock.c:
0011  *
0012  *  Author: Jay Monkman (jmonkman@frasca.com)
0013  *  Copyright (C) 1998 by Frasca International, Inc.
0014  *
0015  *  Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c:
0016  *
0017  *  Author: Andrew Bray <andy@i-cubed.co.uk>
0018  *
0019  *  COPYRIGHT (c) 1995 by i-cubed ltd.
0020  *
0021  *  To anyone who acknowledges that this file is provided "AS IS"
0022  *  without any express or implied warranty:
0023  *      permission to use, copy, modify, and distribute this file
0024  *      for any purpose is hereby granted without fee, provided that
0025  *      the above copyright notice and this notice appears in all
0026  *      copies, and that the name of i-cubed limited not be used in
0027  *      advertising or publicity pertaining to distribution of the
0028  *      software without specific, written prior permission.
0029  *      i-cubed limited makes no representations about the suitability
0030  *      of this software for any purpose.
0031  *
0032  *  Derived from c/src/lib/libcpu/hppa1_1/clock/clock.c:
0033  *
0034  *  COPYRIGHT (c) 1989-2007.
0035  *  On-Line Applications Research Corporation (OAR).
0036  *
0037  *  The license and distribution terms for this file may be
0038  *  found in the file LICENSE in this distribution or at
0039  *  http://www.rtems.org/license/LICENSE.
0040  */
0041
0042 #include <rtems.h>
0043 #include <rtems/clockdrv.h>
0044 #include <rtems/libio.h>
0045 #include <libcpu/irq.h>
0046
0047 #include <stdlib.h>                     /* for atexit() */
0048 #include <mpc5xx.h>
0049
0050 volatile uint32_t Clock_driver_ticks;
0051 extern int BSP_connect_clock_handler(rtems_isr_entry);
0052 extern int BSP_disconnect_clock_handler(void);
0053 extern uint32_t bsp_clicks_per_usec;
0054
0055 /*
0056  *  ISR Handler
0057  */
0058 rtems_isr Clock_isr(rtems_vector_number vector)
0059 {
0060   usiu.piscrk = USIU_UNLOCK_KEY;
0061   usiu.piscr |= USIU_PISCR_PS;          /* acknowledge interrupt */
0062   usiu.piscrk = 0;
0063
0064   Clock_driver_ticks++;
0065   rtems_clock_tick();
0066 }
0067
0068 void clockOn(void* unused)
0069 {
0070   unsigned desiredLevel;
0071   uint32_t pit_value;
0072
0073   /* calculate and set modulus */
0074   pit_value = (rtems_configuration_get_microseconds_per_tick() *
0075                bsp_clicks_per_usec) - 1 ;
0076
0077   if (pit_value > 0xffff) {           /* pit is only 16 bits long */
0078     rtems_fatal_error_occurred(-1);
0079   }
0080   usiu.sccrk = USIU_UNLOCK_KEY;
0081   usiu.sccr &= ~USIU_SCCR_RTDIV;    /* RTC and PIT clock is divided by 4 */
0082   usiu.sccrk = 0;
0083
0084   usiu.pitck = USIU_UNLOCK_KEY;
0085   usiu.pitc = pit_value;
0086   usiu.pitck = 0;
0087
0088   /* set PIT irq level, enable PIT, PIT interrupts */
0089   /*  and clear int. status */
0090   desiredLevel = CPU_irq_level_from_symbolic_name(CPU_PERIODIC_TIMER);
0091
0092   usiu.piscrk = USIU_UNLOCK_KEY;
0093   usiu.piscr = USIU_PISCR_PIRQ(desiredLevel)    /* set interrupt priority */
0094              | USIU_PISCR_PS            /* acknowledge interrupt */
0095              | USIU_PISCR_PIE           /* enable interrupt */
0096              | USIU_PISCR_PITF          /* freeze during debug */
0097              | USIU_PISCR_PTE;          /* enable timer */
0098   usiu.piscrk = 0;
0099 }
0100
0101 void clockOff(void* unused)
0102 {
0103   /* disable PIT and PIT interrupts */
0104   usiu.piscrk = USIU_UNLOCK_KEY;
0105   usiu.piscr &= ~(USIU_PISCR_PTE | USIU_PISCR_PIE);
0106   usiu.piscrk = 0;
0107 }
0108
0109 int clockIsOn(void* unused)
0110 {
0111   if (usiu.piscr & USIU_PISCR_PIE)
0112     return 1;
0113   return 0;
0114 }
0115
0116 /*
0117  * Called via atexit()
0118  * Remove the clock interrupt handler by setting handler to NULL
0119  */
0120 static void Clock_exit(void)
0121 {
0122   (void) BSP_disconnect_clock_handler ();
0123 }
0124
0125 static void Install_clock(rtems_isr_entry clock_isr)
0126 {
0127   Clock_driver_ticks = 0;
0128
0129   BSP_connect_clock_handler (clock_isr);
0130   atexit(Clock_exit);
0131 }
0132
0133 void _Clock_Initialize( void )
0134 {
0135   Install_clock( Clock_isr );
0136 }