shared/pci/generic_clear_hberrs.c

0001 #include <libcpu/io.h>
0002 #include <libcpu/spr.h>
0003
0004 #include <bsp.h>
0005 #include <bsp/pci.h>
0006
0007 #include <rtems/bspIo.h>
0008
0009 #define PCI_ERR_BITS        0xf900
0010 #define PCI_STATUS_OK(x)    (!((x)&PCI_ERR_BITS))
0011
0012 /* For now, just clear errors in the PCI status reg.
0013  *
0014  * Returns: (for diagnostic purposes)
0015  *          original settings (i.e. before applying the clearing
0016  *          sequence) or the error bits or 0 if there were no errors.
0017  *
0018  */
0019
0020 unsigned short
0021 (*_BSP_clear_vmebridge_errors)(int) = 0;
0022
0023 unsigned long
0024 _BSP_clear_hostbridge_errors(int enableMCP, int quiet)
0025 {
0026 unsigned long   rval;
0027 unsigned short  pcistat;
0028 int             count;
0029
0030     if (enableMCP)
0031     return -1; /* exceptions not supported / MCP not wired */
0032
0033     /* read error status for info return */
0034     pci_read_config_word(0,0,0,PCI_STATUS,&pcistat);
0035     rval = pcistat;
0036
0037     count=10;
0038     do {
0039         /* clear error reporting registers */
0040
0041         /* clear PCI status register */
0042         pci_write_config_word(0,0,0,PCI_STATUS, PCI_ERR_BITS);
0043
0044         /* read  new status */
0045         pci_read_config_word(0,0,0,PCI_STATUS, &pcistat);
0046
0047     } while ( ! PCI_STATUS_OK(pcistat) && count-- );
0048
0049     if ( !PCI_STATUS_OK(rval) && !quiet) {
0050         printk("Cleared PCI errors: pci_stat was 0x%04lx\n", rval);
0051     }
0052     if ( !PCI_STATUS_OK(pcistat) ) {
0053         printk("Unable to clear PCI errors: still 0x%04x after 10 attempts\n", pcistat);
0054     }
0055
0056     rval &= PCI_ERR_BITS;
0057
0058     /* Some VME bridges (Tsi148) don't propagate VME bus errors to PCI status reg. */
0059     if ( _BSP_clear_vmebridge_errors )
0060         rval |= _BSP_clear_vmebridge_errors(quiet)<<16;
0061
0062     return rval;
0063 }