shared/irq/ppc-irq-generic.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsPowerPC
0007  *
0008  * @brief Generic Interrupt suppoer
0009  */
0010
0011 /*
0012  * Copyright (C) 2021 Chris Johns. All rights reserved.
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #include <stdlib.h>
0037
0038 #include <rtems.h>
0039 #include <stdlib.h>
0040 #include <rtems/bspIo.h> /* for printk */
0041 #include <libcpu/spr.h>
0042 #include <bsp/irq_supp.h>
0043 #include <bsp/irq-generic.h>
0044 #include <bsp/vectors.h>
0045
0046 SPR_RW(BOOKE_TSR)
0047 SPR_RW(PPC405_TSR)
0048
0049 /* legacy mode for bookE DEC exception;
0050  * to avoid the double layer of function calls
0051  * (dec_handler_bookE -> C_dispatch_irq_handler -> user handler)
0052  * it is preferrable for the user to hook the DEC
0053  * exception directly.
0054  * However, the legacy mode works with less modifications
0055  * of user code.
0056  */
0057 static int C_dispatch_dec_handler_bookE (BSP_Exception_frame *frame, unsigned int excNum)
0058 {
0059   /* clear interrupt; we must do this
0060    * before C_dispatch_irq_handler()
0061    * re-enables MSR_EE.
0062    * Note that PPC405 uses a different SPR# for TSR
0063    */
0064   if (ppc_cpu_is_bookE()==PPC_BOOKE_405)
0065     _write_PPC405_TSR( BOOKE_TSR_DIS );
0066   else
0067     _write_BOOKE_TSR( BOOKE_TSR_DIS );
0068   return C_dispatch_irq_handler(frame, ASM_DEC_VECTOR);
0069 }
0070
0071 /*
0072  * RTEMS Global Interrupt Handler Management Routines
0073  */
0074 int BSP_rtems_irq_generic_set(rtems_irq_global_settings* config)
0075 {
0076   int r;
0077
0078   r = BSP_setup_the_pic(config);
0079   if (!r)
0080     return r;
0081
0082   ppc_exc_set_handler(ASM_EXT_VECTOR, C_dispatch_irq_handler);
0083   if ( ppc_cpu_is_bookE() ) {
0084     /* bookE decrementer interrupt needs to be cleared BEFORE
0085      * dispatching the user ISR (because the user ISR is called
0086      * with EE enabled)
0087      * We do this so that existing DEC handlers can be used
0088      * with minor modifications.
0089      */
0090     ppc_exc_set_handler(ASM_BOOKE_DEC_VECTOR, C_dispatch_dec_handler_bookE);
0091   } else {
0092     ppc_exc_set_handler(ASM_DEC_VECTOR, C_dispatch_irq_handler);
0093   }
0094
0095   return 1;
0096 }
0097
0098 rtems_status_code bsp_interrupt_get_attributes(
0099   rtems_vector_number         vector,
0100   rtems_interrupt_attributes *attributes
0101 )
0102 {
0103   return RTEMS_SUCCESSFUL;
0104 }
0105
0106 rtems_status_code bsp_interrupt_is_pending(
0107   rtems_vector_number vector,
0108   bool               *pending
0109 )
0110 {
0111   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0112   bsp_interrupt_assert(pending != NULL);
0113   *pending = false;
0114   return RTEMS_UNSATISFIED;
0115 }
0116
0117 rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
0118 {
0119   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0120   return RTEMS_UNSATISFIED;
0121 }
0122
0123 rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
0124 {
0125   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0126   return RTEMS_UNSATISFIED;
0127 }
0128
0129 rtems_status_code bsp_interrupt_vector_is_enabled(
0130   rtems_vector_number vector,
0131   bool               *enabled
0132 )
0133 {
0134   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0135   bsp_interrupt_assert(enabled != NULL);
0136   *enabled = false;
0137   return RTEMS_UNSATISFIED;
0138 }
0139
0140 rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
0141 {
0142   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0143   BSP_enable_irq_at_pic(vector);
0144   return RTEMS_SUCCESSFUL;
0145 }
0146
0147 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
0148 {
0149   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0150   BSP_disable_irq_at_pic(vector);
0151   return RTEMS_SUCCESSFUL;
0152 }
0153
0154 rtems_status_code bsp_interrupt_set_priority(
0155   rtems_vector_number vector,
0156   uint32_t priority
0157 )
0158 {
0159   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0160   return RTEMS_UNSATISFIED;
0161 }
0162
0163 rtems_status_code bsp_interrupt_get_priority(
0164   rtems_vector_number vector,
0165   uint32_t *priority
0166 )
0167 {
0168   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0169   bsp_interrupt_assert(priority != NULL);
0170   return RTEMS_UNSATISFIED;
0171 }
0172
0173 void bsp_interrupt_facility_initialize(void)
0174 {
0175   /*
0176    * Initialize RTEMS IRQ system
0177    */
0178   BSP_rtems_irq_mng_init(0);
0179 }