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File indexing completed on 2025-05-11 08:23:57
0001 /* SPDX-License-Identifier: BSD-2-Clause */ 0002 0003 /** 0004 * @file 0005 * 0006 * @ingroup RTEMSBSPsPowerPCQorIQ 0007 * 0008 * @brief This header file provides the interfaces used by VME bus device 0009 * drivers. 0010 * 0011 * Note that for the MVME2500, you need the PCIe support from libbsd for this to 0012 * work. 0013 */ 0014 0015 /* 0016 * Copyright (C) 2023 embedded brains GmbH & Co. KG 0017 * 0018 * Redistribution and use in source and binary forms, with or without 0019 * modification, are permitted provided that the following conditions 0020 * are met: 0021 * 1. Redistributions of source code must retain the above copyright 0022 * notice, this list of conditions and the following disclaimer. 0023 * 2. Redistributions in binary form must reproduce the above copyright 0024 * notice, this list of conditions and the following disclaimer in the 0025 * documentation and/or other materials provided with the distribution. 0026 * 0027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 0028 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 0029 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 0030 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 0031 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 0032 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 0033 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 0034 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 0035 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 0036 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 0037 * POSSIBILITY OF SUCH DAMAGE. 0038 */ 0039 0040 #ifndef RTEMS_BSP_VME_CONFIG_H 0041 #define RTEMS_BSP_VME_CONFIG_H 0042 0043 #ifdef __cplusplus 0044 extern "C" { 0045 #endif /* __cplusplus */ 0046 0047 #define _VME_DRIVER_TSI148 0048 0049 /* 0050 * Base address of the PCI that is used for the VME bridge. Value is set in 0051 * libbsd during device discovery. 0052 */ 0053 extern uintptr_t bsp_vme_pcie_base_address; 0054 0055 #define PCI_MEM_BASE 0 0056 #define PCI_DRAM_OFFSET 0 0057 0058 /* 0059 * NOTE: shared vmeconfig.c uses hardcoded window lengths that match this layout 0060 * 0061 * The memory length of the PCIe controllers on the P2020 processor is 0062 * 0x20000000. The Tsi148 registers are mapped at the bsp_vme_pcie_base_address 0063 * with a size of 0x1000. Therefore the VME windows are arranged a bit different 0064 * then on other BSPs. 0065 */ 0066 #define _VME_A32_WIN0_ON_PCI (bsp_vme_pcie_base_address + 0x10000000) 0067 #define _VME_A24_ON_PCI (bsp_vme_pcie_base_address + 0x03000000) 0068 #define _VME_A16_ON_PCI (bsp_vme_pcie_base_address + 0x02000000) 0069 #define _VME_CSR_ON_PCI (bsp_vme_pcie_base_address + 0x01000000) 0070 0071 /* FIXME: Make this a BSP config option */ 0072 #define _VME_A32_WIN0_ON_VME 0x20000000 0073 0074 /* 0075 * FIXME: The fixed QORIQ_IRQ_EXT_0 is valid for the MVME2500 board. In theory 0076 * there should be some possibility to get that information from the device tree 0077 * or from PCI config space. But I didn't find it anywhere. 0078 */ 0079 #define BSP_VME_INSTALL_IRQ_MGR(err) \ 0080 do { \ 0081 err = qoriq_pic_set_sense_and_polarity(\ 0082 QORIQ_IRQ_EXT_0, \ 0083 QORIQ_EIRQ_TRIGGER_LEVEL_LOW, \ 0084 NULL \ 0085 ); \ 0086 if (err == 0) { \ 0087 err = vmeTsi148InstallIrqMgrAlt(0, 0, QORIQ_IRQ_EXT_0, -1); \ 0088 } \ 0089 } while (0) 0090 0091 /* Add prototypes that are in all VMEConfig.h files */ 0092 extern int BSP_VMEInit(void); 0093 extern int BSP_VMEIrqMgrInstall(void); 0094 extern unsigned short (*_BSP_clear_vmebridge_errors)(int); 0095 0096 #ifdef __cplusplus 0097 } 0098 #endif /* __cplusplus */ 0099 0100 #endif /* RTEMS_BSP_VME_CONFIG_H */
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