psim/irq/irq_init.c

0001 /*
0002  *  This file contains the implementation of rtems initialization
0003  *  related to interrupt handling
0004  */
0005
0006 /*
0007  *  Copyright (C) 1999 valette@crf.canon.fr
0008  *
0009  *  Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com>
0010  *  to make it valid for MVME2300 Motorola boards.
0011  *
0012  *  The license and distribution terms for this file may be
0013  *  found in the file LICENSE in this distribution or at
0014  *  http://www.rtems.org/license/LICENSE.
0015  */
0016
0017 #include <libcpu/io.h>
0018 #include <libcpu/spr.h>
0019 #include <bsp/irq.h>
0020 #include <bsp.h>
0021 #include <psim.h>
0022 #include <bsp/vectors.h>
0023 #include <rtems/bspIo.h>
0024 #include <bsp/openpic.h>
0025 #include <bsp/irq-generic.h>
0026
0027 static rtems_irq_connect_data      rtemsIrq[BSP_IRQ_NUMBER];
0028 static rtems_irq_global_settings   initial_config;
0029 static rtems_irq_connect_data      defaultIrq = {
0030   /* vectorIdex, hdl  , handle  , on  , off , isOn */
0031       0,          NULL, NULL    , NULL, NULL, NULL
0032 };
0033 static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
0034   /*
0035    * Processor exceptions handled as interrupts
0036    */
0037   0
0038 };
0039
0040   /*
0041    * This code assumes the exceptions management setup has already
0042    * been done. We just need to replace the exceptions that will
0043    * be handled like interrupt. On mcp750/mpc750 and many PPC processors
0044    * this means the decrementer exception and the external exception.
0045    */
0046 void BSP_rtems_irq_mng_init(unsigned cpuId)
0047 {
0048   int i;
0049
0050   /*
0051    * First initialize the Interrupt management hardware
0052    */
0053   OpenPIC = (void*)PSIM.OpenPIC;
0054   openpic_init(1,0,0,16,0,0);
0055
0056   /*
0057    * Initialize RTEMS management interrupt table
0058    */
0059   /*
0060    * re-init the rtemsIrq table
0061    */
0062   for (i = 0; i < BSP_IRQ_NUMBER; i++) {
0063     rtemsIrq[i]      = defaultIrq;
0064     rtemsIrq[i].name = i;
0065   }
0066   /*
0067    * Init initial Interrupt management config
0068    */
0069   initial_config.irqNb        = BSP_IRQ_NUMBER;
0070   initial_config.defaultEntry = defaultIrq;
0071   initial_config.irqHdlTbl    = rtemsIrq;
0072   initial_config.irqBase      = BSP_LOWEST_OFFSET;
0073   initial_config.irqPrioTbl   = irqPrioTable;
0074
0075   for (i = BSP_PCI_IRQ_LOWEST_OFFSET; i< BSP_PCI_IRQ_NUMBER; i++ ) {
0076     irqPrioTable[i] = 8;
0077   }
0078
0079   if (!BSP_rtems_irq_mngt_set(&initial_config)) {
0080     /*
0081      * put something here that will show the failure...
0082      */
0083     rtems_panic(
0084       "Unable to initialize RTEMS interrupt Management!!! System locked\n"
0085     );
0086   }
0087
0088   #ifdef TRACE_IRQ_INIT
0089     printk("RTEMS IRQ management is now operationnal\n");
0090   #endif
0091 }
0092
0093 static int psim_exception_handler(
0094   BSP_Exception_frame *frame,
0095   unsigned exception_number
0096 )
0097 {
0098   rtems_panic("Unexpected interrupt occured");
0099   return 0;
0100 }
0101
0102 /*
0103  * functions to enable/disable a source at the ipic
0104  */
0105 rtems_status_code bsp_interrupt_get_attributes(
0106   rtems_vector_number         vector,
0107   rtems_interrupt_attributes *attributes
0108 )
0109 {
0110   return RTEMS_SUCCESSFUL;
0111 }
0112
0113 rtems_status_code bsp_interrupt_is_pending(
0114   rtems_vector_number vector,
0115   bool               *pending
0116 )
0117 {
0118   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0119   bsp_interrupt_assert(pending != NULL);
0120   *pending = false;
0121   return RTEMS_UNSATISFIED;
0122 }
0123
0124 rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
0125 {
0126   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0127   return RTEMS_UNSATISFIED;
0128 }
0129
0130 rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
0131 {
0132   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0133   return RTEMS_UNSATISFIED;
0134 }
0135
0136 rtems_status_code bsp_interrupt_vector_is_enabled(
0137   rtems_vector_number vector,
0138   bool               *enabled
0139 )
0140 {
0141   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0142   bsp_interrupt_assert(enabled != NULL);
0143   *enabled = false;
0144   return RTEMS_UNSATISFIED;
0145 }
0146
0147 rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number irqnum)
0148 {
0149   /* FIXME: do something */
0150   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(irqnum));
0151   return RTEMS_SUCCESSFUL;
0152 }
0153
0154 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum)
0155 {
0156   /* FIXME: do something */
0157   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(irqnum));
0158   return RTEMS_SUCCESSFUL;
0159 }
0160
0161 rtems_status_code bsp_interrupt_set_priority(
0162   rtems_vector_number vector,
0163   uint32_t priority
0164 )
0165 {
0166   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0167   return RTEMS_UNSATISFIED;
0168 }
0169
0170 rtems_status_code bsp_interrupt_get_priority(
0171   rtems_vector_number vector,
0172   uint32_t *priority
0173 )
0174 {
0175   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0176   bsp_interrupt_assert(priority != NULL);
0177   return RTEMS_UNSATISFIED;
0178 }
0179
0180 void bsp_interrupt_facility_initialize(void)
0181 {
0182   rtems_status_code sc;
0183
0184   /* Install exception handler */
0185   sc = ppc_exc_set_handler( ASM_EXT_VECTOR, psim_exception_handler);
0186   _Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL);
0187 }