mvme5500/irq/irq_init.c

0001 /* irq_init.c
0002  *
0003  * This file contains the implementation of rtems initialization
0004  * related to interrupt handling.
0005  *
0006  * CopyRight (C) 1999 valette@crf.canon.fr
0007  *
0008  * Modified and added support for the MVME5500.
0009  * Copyright 2003, 2004, 2005, Brookhaven National Laboratory and
0010  *                 Shuchen Kate Feng <feng1@bnl.gov>
0011  *
0012  * The license and distribution terms for this file may be
0013  * found in the file LICENSE in this distribution or at
0014  * http://www.rtems.org/license/LICENSE
0015  *
0016  */
0017 #include <libcpu/io.h>
0018 #include <libcpu/spr.h>
0019 #include <bsp/irq.h>
0020 #include <bsp.h>
0021 #include <bsp/vectors.h>  /* ASM_EXT_VECTOR, ASM_DEC_VECTOR ... */
0022 /*#define  TRACE_IRQ_INIT*/
0023
0024 /*
0025  * default on/off function
0026  */
0027 static void nop_func(void){}
0028 /*
0029  * default isOn function
0030  */
0031 static int not_connected(void) {return 0;}
0032
0033 static rtems_irq_connect_data       rtemsIrq[BSP_IRQ_NUMBER];
0034 static rtems_irq_global_settings        initial_config;
0035
0036 static rtems_irq_connect_data       defaultIrq = {
0037   .name   = 0,
0038   .hdl    = NULL,
0039   .handle = NULL,
0040   .on     = (rtems_irq_enable) nop_func,
0041   .off    = (rtems_irq_disable) nop_func,
0042   .isOn   = (rtems_irq_is_enabled) not_connected,
0043 #ifdef BSP_SHARED_HANDLER_SUPPORT
0044   .next_handler = NULL
0045 #endif
0046 };
0047
0048 rtems_irq_prio BSPirqPrioTable[BSP_PIC_IRQ_NUMBER] = {
0049   /*
0050    * This table is where the developers can change the levels of priority
0051    * based on the need of their applications.
0052    *
0053    * actual priorities for CPU MAIN and GPP interrupts (0-95)
0054    *
0055    *    0   means that only current interrupt is masked (lowest priority)
0056    *    255 is only used by bits 24, 25, 26 and 27 of the CPU high
0057    *        interrupt Mask: (e.g. GPP7_0, GPP15_8, GPP23_16, GPP31_24).
0058    *        The IRQs of those four bits are always enabled. When it's used,
0059    *        the IRQ number is never listed in the dynamic picIsrTable[96].
0060    *
0061    *        The priorities of GPP interrupts were decided by their own
0062    *        value set at  BSPirqPrioTable.
0063    *
0064    */
0065   /* CPU Main cause low interrupt */
0066   /* 0-15 */
0067   0, 0, 0, 0, 0, 0, 0, 0, 64/*Timer*/, 0, 0, 0, 0, 0, 0, 0,
0068    /* 16-31 */
0069   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0070   /* CPU Main cause high interrupt */
0071   /* 32-47 */
0072   2/*10/100MHZ*/, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0073   /* 48-63 */
0074   0, 0, 0, 0, 0, 0, 0, 0,
0075   255 /*GPP0-7*/, 255/*GPP8-15*/, 255/*GPP16-23*/, 255/*GPP24-31*/, 0, 0, 0, 0,
0076   /* GPP interrupts */
0077   /* GPP0-7 */
0078   1/*serial*/,0, 0, 0, 0, 0, 0, 0,
0079   /* GPP8-15 */
0080   47/*PMC1A*/,46/*PMC1B*/,45/*PMC1C*/,44/*PMC1D*/,30/*VME0*/, 29/*VME1*/,3,1,
0081   /* GPP16-23 */
0082   37/*PMC2A*/,36/*PMC2B*/,35/*PMC2C*/,34/*PMC2D*/,23/*1GHZ*/, 0,0,0,
0083   /* GPP24-31 */
0084   7/*watchdog*/, 0,0,0,0,0,0,0
0085 };
0086
0087 /*
0088  * This code assumes the exceptions management setup has already
0089  * been done. We just need to replace the exceptions that will
0090  * be handled like interrupt. On MPC7455 and many PPC processors
0091  * this means the decrementer exception and the external exception.
0092  */
0093 void BSP_rtems_irq_mng_init(unsigned cpuId)
0094 {
0095   int                   i;
0096   rtems_interrupt_level level;
0097
0098   /*
0099    * First initialize the Interrupt management hardware
0100    */
0101 #ifdef TRACE_IRQ_INIT
0102   printk("Initializing the interrupt controller of the GT64260\n");
0103 #endif
0104
0105 #ifdef TRACE_IRQ_INIT
0106   printk("Going to re-initialize the rtemsIrq table %d\n",BSP_IRQ_NUMBER);
0107 #endif
0108   /*
0109    * Initialize RTEMS management interrupt table
0110    */
0111   /*
0112    * re-init the rtemsIrq table
0113    */
0114   for (i = 0; i < BSP_IRQ_NUMBER; i++) {
0115     rtemsIrq[i]      = defaultIrq;
0116     rtemsIrq[i].name = i;
0117   }
0118
0119   /*
0120    * Init initial Interrupt management config
0121    */
0122   initial_config.irqNb  = BSP_IRQ_NUMBER;
0123   initial_config.defaultEntry   = defaultIrq;
0124   initial_config.irqHdlTbl  = rtemsIrq;
0125   initial_config.irqBase    = BSP_LOWEST_OFFSET;
0126   initial_config.irqPrioTbl = BSPirqPrioTable;
0127
0128 #ifdef TRACE_IRQ_INIT
0129   printk("Going to setup irq mngt configuration\n");
0130 #endif
0131
0132   rtems_interrupt_disable(level);
0133   (void) level; /* avoid set but not used warning */
0134
0135   if (!BSP_rtems_irq_mngt_set(&initial_config)) {
0136       /*
0137        * put something here that will show the failure...
0138        */
0139       rtems_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
0140   }
0141 #ifdef TRACE_IRQ_INIT
0142   printk("Done setup irq mngt configuration\n");
0143 #endif
0144
0145 #ifdef TRACE_IRQ_INIT
0146   printk("RTEMS IRQ management is now operationnal\n");
0147 #endif
0148 }