include/bsp/irq.h

0001 /* irq.h
0002  *
0003  *  This include file describe the data structure and the functions implemented
0004  *  by rtems to write interrupt handlers.
0005  *
0006  *  CopyRight (C) 1999 valette@crf.canon.fr
0007  *
0008  *  This code is heavilly inspired by the public specification of STREAM V2
0009  *  that can be found at :
0010  *
0011  *      <http://www.chorus.com/Documentation/index.html> by following
0012  *  the STREAM API Specification Document link.
0013  *
0014  *  The license and distribution terms for this file may be
0015  *  found in the file LICENSE in this distribution or at
0016  *  http://www.rtems.org/license/LICENSE.
0017  *
0018  * Copyright 2004, 2005 Brookhaven National Laboratory and
0019  *                 Shuchen Kate Feng <feng1@bnl.gov>
0020  *
0021  *    - modified shared/irq/irq.h for Mvme5500 (no ISA devices/PIC)
0022  *    - Discovery GT64260 interrupt controller instead of 8259.
0023  *    - Added support for software IRQ priority levels.
0024  *    - modified to optimize the IRQ latency and handling
0025  */
0026
0027 #ifndef LIBBSP_POWERPC_MVME5500_IRQ_IRQ_H
0028 #define LIBBSP_POWERPC_MVME5500_IRQ_IRQ_H
0029
0030 #define BSP_SHARED_HANDLER_SUPPORT      1
0031 #include <rtems/irq.h>
0032
0033 #ifndef ASM
0034
0035 #include <bsp/irq-default.h>
0036
0037 #define OneTierIrqPrioTbl 1
0038
0039 /*
0040  * Symbolic IRQ names and related definitions.
0041  */
0042
0043 /* leave the ISA symbols in there, so we can reuse shared/irq.c
0044  * Also, we start numbering PCI irqs at 16 because the OPENPIC
0045  * driver relies on this when mapping irq number <-> vectors
0046  * (OPENPIC_VEC_SOURCE in openpic.h)
0047  */
0048
0049   /* See section 25.2 , Table 734 of GT64260 controller
0050    * Main Interrupt Cause Low register
0051    */
0052 #define BSP_MICL_IRQ_NUMBER           (32)
0053 #define BSP_MICL_IRQ_LOWEST_OFFSET    (0)
0054 #define BSP_MICL_IRQ_MAX_OFFSET       (BSP_MICL_IRQ_LOWEST_OFFSET + BSP_MICL_IRQ_NUMBER -1)
0055   /*
0056    * Main Interrupt Cause High register
0057    */
0058 #define BSP_MICH_IRQ_NUMBER           (32)
0059 #define BSP_MICH_IRQ_LOWEST_OFFSET    (BSP_MICL_IRQ_MAX_OFFSET+1)
0060 #define BSP_MICH_IRQ_MAX_OFFSET       (BSP_MICH_IRQ_LOWEST_OFFSET + BSP_MICH_IRQ_NUMBER -1)
0061  /* External GPP Interrupt assignements
0062   */
0063 #define BSP_GPP_IRQ_NUMBER      (32)
0064 #define BSP_GPP_IRQ_LOWEST_OFFSET   (BSP_MICH_IRQ_MAX_OFFSET+1)
0065 #define BSP_GPP_IRQ_MAX_OFFSET      (BSP_GPP_IRQ_LOWEST_OFFSET + BSP_GPP_IRQ_NUMBER - 1)
0066
0067  /*
0068   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
0069   * handler might be connected
0070   */
0071 #define BSP_PROCESSOR_IRQ_NUMBER     (1)
0072 #define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_GPP_IRQ_MAX_OFFSET + 1)
0073 #define BSP_PROCESSOR_IRQ_MAX_OFFSET    (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
0074
0075   /* allow a couple of vectors for VME and counter/timer irq sources etc.
0076    * This is probably not needed any more.
0077    */
0078 #define BSP_MISC_IRQ_NUMBER     (30)
0079 #define BSP_MISC_IRQ_LOWEST_OFFSET  (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
0080 #define BSP_MISC_IRQ_MAX_OFFSET (BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1)
0081
0082   /*
0083    * Summary
0084    */
0085 #define BSP_IRQ_NUMBER          (BSP_MISC_IRQ_MAX_OFFSET + 1)
0086 #define BSP_MAIN_IRQ_NUMBER             (64)
0087 #define BSP_PIC_IRQ_NUMBER              (96)
0088 #define BSP_LOWEST_OFFSET       (BSP_MICL_IRQ_LOWEST_OFFSET)
0089 #define BSP_MAX_OFFSET          (BSP_MISC_IRQ_MAX_OFFSET)
0090
0091   /* Main CPU interrupt cause (Low) */
0092 #define BSP_MAIN_TIMER0_1_IRQ         (BSP_MICL_IRQ_LOWEST_OFFSET+8)
0093 #define BSP_MAIN_PCI0_7_0             (BSP_MICL_IRQ_LOWEST_OFFSET+12)
0094 #define BSP_MAIN_PCI0_15_8            (BSP_MICL_IRQ_LOWEST_OFFSET+13)
0095 #define BSP_MAIN_PCI0_23_16           (BSP_MICL_IRQ_LOWEST_OFFSET+14)
0096 #define BSP_MAIN_PCI0_31_24           (BSP_MICL_IRQ_LOWEST_OFFSET+15)
0097 #define BSP_MAIN_PCI1_7_0             (BSP_MICL_IRQ_LOWEST_OFFSET+16)
0098 #define BSP_MAIN_PCI1_15_8            (BSP_MICL_IRQ_LOWEST_OFFSET+18)
0099 #define BSP_MAIN_PCI1_23_16           (BSP_MICL_IRQ_LOWEST_OFFSET+19)
0100 #define BSP_MAIN_PCI1_31_24           (BSP_MICL_IRQ_LOWEST_OFFSET+20)
0101
0102
0103   /* Main CPU interrupt cause (High) */
0104 #define BSP_MAIN_ETH0_IRQ             (BSP_MICH_IRQ_LOWEST_OFFSET)
0105 #define BSP_MAIN_ETH1_IRQ             (BSP_MICH_IRQ_LOWEST_OFFSET+1)
0106 #define BSP_MAIN_ETH2_IRQ             (BSP_MICH_IRQ_LOWEST_OFFSET+2)
0107 #define BSP_MAIN_GPP7_0_IRQ           (BSP_MICH_IRQ_LOWEST_OFFSET+24)
0108 #define BSP_MAIN_GPP15_8_IRQ          (BSP_MICH_IRQ_LOWEST_OFFSET+25)
0109 #define BSP_MAIN_GPP23_16_IRQ         (BSP_MICH_IRQ_LOWEST_OFFSET+26)
0110 #define BSP_MAIN_GPP31_24_IRQ         (BSP_MICH_IRQ_LOWEST_OFFSET+27)
0111
0112   /* on the MVME5500, these are the GT64260B external GPP0 interrupt */
0113 #define BSP_PCI_IRQ_LOWEST_OFFSET       (BSP_GPP_IRQ_LOWEST_OFFSET)
0114 #define BSP_UART_COM2_IRQ       (BSP_GPP_IRQ_LOWEST_OFFSET)
0115 #define BSP_UART_COM1_IRQ       (BSP_GPP_IRQ_LOWEST_OFFSET)
0116 #define BSP_GPP8_IRQ_OFFSET     (BSP_GPP_IRQ_LOWEST_OFFSET+8)
0117 #define BSP_GPP_PMC1_INTA       (BSP_GPP8_IRQ_OFFSET)
0118 #define BSP_GPP16_IRQ_OFFSET          (BSP_GPP_IRQ_LOWEST_OFFSET+16)
0119 #define BSP_GPP24_IRQ_OFFSET          (BSP_GPP_IRQ_LOWEST_OFFSET+24)
0120 #define BSP_GPP_VME_VLINT0            (BSP_GPP_IRQ_LOWEST_OFFSET+12)
0121 #define BSP_GPP_VME_VLINT1            (BSP_GPP_IRQ_LOWEST_OFFSET+13)
0122 #define BSP_GPP_VME_VLINT2            (BSP_GPP_IRQ_LOWEST_OFFSET+14)
0123 #define BSP_GPP_VME_VLINT3            (BSP_GPP_IRQ_LOWEST_OFFSET+15)
0124 #define BSP_GPP_PMC2_INTA             (BSP_GPP_IRQ_LOWEST_OFFSET+16)
0125 #define BSP_GPP_82544_IRQ             (BSP_GPP_IRQ_LOWEST_OFFSET+20)
0126 #define BSP_GPP_WDT_NMI_IRQ           (BSP_GPP_IRQ_LOWEST_OFFSET+24)
0127 #define BSP_GPP_WDT_EXP_IRQ           (BSP_GPP_IRQ_LOWEST_OFFSET+25)
0128
0129  /*
0130    * Some Processor execption handled as rtems IRQ symbolic name definition
0131    */
0132 #define BSP_DECREMENTER     (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
0133
0134 extern void BSP_rtems_irq_mng_init(unsigned cpuId);
0135
0136 #include <bsp/irq_supp.h>
0137
0138 #endif
0139 #endif