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File indexing completed on 2025-05-11 08:23:57

0001 #ifndef RTEMS_BSP_VME_CONFIG_H
0002 #define RTEMS_BSP_VME_CONFIG_H
0003 /* VMEConfig.h, S. Kate Feng modified it for MVME5500 3/04 
0004  * 
0005  * May 2011 : Use the VME shared IRQ handlers.
0006  *
0007  * It seems that the implementation of VMEUNIVERSE_IRQ_MGR_FLAG_PW_WORKAROUND
0008  * is not fully developed. The UNIV_REGOFF_VCSR_BS is defined for VME64
0009  * specification, which does not apply to a VME32 crate. In order to avoid
0010  * spurious VME interrupts, a better and more universal solution is
0011  * to flush the vmeUniverse FIFO by reading a register back within the
0012  * users' Interrupt Service Routine (ISR)  before returning.
0013  *
0014  * Some devices might require the ISR to issue an interrupt status READ
0015  * after its IRQ is cleared, but before its corresponding interrupt
0016  * is enabled again. 
0017  * 
0018  */
0019 
0020 /*
0021  *  Prototypes
0022  */
0023 int BSP_VMEInit(void);
0024 int BSP_VMEIrqMgrInstall(void);
0025 
0026 /* BSP specific address space configuration parameters */
0027 
0028 /* 
0029  * The BSP maps VME address ranges into
0030  * one BAT.
0031  * NOTE: the BSP (startup/bspstart.c) uses
0032  * hardcoded window lengths that match this
0033  * layout:
0034  */
0035 #define _VME_A32_WIN0_ON_PCI            0x90000000
0036 /* If _VME_CSR_ON_PCI is defined then the A32 window is reduced to accommodate
0037  * CSR for space.
0038  */
0039 #define _VME_CSR_ON_PCI                 0x9e000000
0040 #define _VME_A24_ON_PCI                 0x9f000000
0041 #define _VME_A16_ON_PCI                 0x9fff0000
0042 
0043 /* Reuse BAT 0 for VME */
0044 #define BSP_VME_BAT_IDX                 0
0045 
0046 /* start of the A32 window on the VME bus
0047  * TODO: this should perhaps be a configuration option
0048  */
0049 #define _VME_A32_WIN0_ON_VME            0x20000000
0050 
0051 /* if _VME_DRAM_OFFSET is defined, the BSP
0052  * will map our RAM onto the VME bus, starting
0053  * at _VME_DRAM_OFFSET
0054  */
0055 #define _VME_DRAM_OFFSET                0x90000000
0056 
0057 #define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err) \
0058         do { \
0059           err = vmeUniverseInstallIrqMgrAlt(VMEUNIVERSE_IRQ_MGR_FLAG_SHARED, \
0060              0, BSP_GPP_VME_VLINT0, \
0061              1, BSP_GPP_VME_VLINT1, \
0062              2, BSP_GPP_VME_VLINT2, \
0063              3, BSP_GPP_VME_VLINT3, \
0064              -1 /* terminate list  */);  \
0065         } while (0)
0066 
0067 #endif